參數資料
型號： LT1162
廠商： Linear Technology Corporation
英文描述： Half-/Full-Bridge N-Channel Power MOSFET Drivers
中文描述： Half-/Full-Bridge N溝道功率MOSFET驅動器
文件頁數： 3/16頁
文件大?。?/td> 347K
代理商： LT1162
3
LT1160/LT1162
I
UVOUT
V
UVOUT
V
OH
Undervoltage Output Leakage
Undervoltage Output Saturation
Top Gate ON Voltage
Bottom Gate ON Voltage
Top Gate OFF Voltage
Bottom Gate OFF Voltage
Top Gate Rise Time
V
+
= 15V
V
+
= 7.5V, I
UVOUT
= 2.5mA
V
INTOP
= 2V, V
INBOTTOM
= 0.8V
V
INTOP
= 0.8V, V
INBOTTOM
= 2V
V
INTOP
= 0.8V, V
INBOTTOM
= 2V
V
INTOP
= 2V, V
INBOTTOM
= 0.8V
V
INTOP
(+) Transition, V
INBOTTOM
= 0.8V,
Measured at V
TGATE DR
(Note 4)
V
INBOTTOM
(+) Transition, V
INTOP
= 0.8V,
Measured at V
BGATE DR
(Note 4)
V
INTOP
(–) Transition, V
INBOTTOM
= 0.8V,
Measured at V
TGATE DR
(Note 4)
V
INBOTTOM
(–) Transition, V
INTOP
= 0.8V,
Measured at V
BGATE DR
(Note 4)
V
INTOP
(+) Transition, V
INBOTTOM
= 0.8V,
Measured at V
TGATE DR
(Note 4)
V
INBOTTOM
(+) Transition, V
INTOP
= 0.8V,
Measured at V
BGATE DR
(Note 4)
V
INTOP
(–) Transition, V
INBOTTOM
= 0.8V,
Measured at V
TGATE DR
(Note 4)
V
INBOTTOM
(–) Transition, V
INTOP
= 0.8V,
Measured at V
BGATE DR
(Note 4)
V
INBOTTOM
(+) Transition, V
INTOP
= 2V,
Measured at V
TGATE DR
(Note 4)
V
INTOP
(+) Transition, V
INBOTTOM
= 2V,
Measured at V
BGATE DR
(Note 4)
V
INBOTTOM
(–) Transition, V
INTOP
= 2V,
Measured at V
TGATE DR
(Note 4)
V
INTOP
(–) Transition, V
INBOTTOM
= 2V,
Measured at V
BGATE DR
(Note 4)
G
0.1
0.2
11.3
11.3
0.4
0.4
130
5
μ
A
V
V
V
V
V
ns
G
0.4
12
12
0.7
0.7
200
G
11
11
G
V
OL
G
G
t
r
G
Bottom Gate Rise Time
G
90
200
ns
t
f
Top Gate Fall Time
G
60
140
ns
Bottom Gate Fall Time
G
60
140
ns
t
D1
Top Gate Turn-On Delay
G
250
500
ns
Bottom Gate Turn-On Delay
G
200
400
ns
t
D2
Top Gate Turn-Off Delay
G
300
600
ns
Bottom Gate Turn-Off Delay
G
200
400
ns
t
D3
Top Gate Lockout Delay
G
300
600
ns
Bottom Gate Lockout Delay
G
250
500
ns
t
D4
Top Gate Release Delay
G
250
500
ns
Bottom Gate Release Delay
G
200
400
ns
Test Circuit, T
A
= 25
°
C, V
+
= V
BOOST
= 12V, V
TSOURCE
= 0V, C
GATE
= 3000pF.
Gate Feedback pins connected to Gate Drive pins, unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
ELECTRICAL CHARACTERISTICS
The
G
denotes specifications which apply over the full operating
temperature range.
Note 1:
For the LT1160, Pins 1, 10 should be connected together. For the
LT1162, Pins 1, 7, 14, 20 should be connected together.
Note 2:
T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
according to the following formulas:
LT1160CN/LT1160IN: T
J
= T
A
+ (P
D
)(70
°
C/W)
LT1160CS/LT1160IS: T
J
= T
A
+ (P
D
)(110
°
C/W)
LT1162CN/LT1162IN: T
J
= T
A
+ (P
D
)(58
°
C/W)
LT1162CS/LT1162IS: T
J
= T
A
+ (P
D
)(80
°
C/W)
Note 3:
I
S
is the sum of currents through SV
+
, PV
+
and Boost pins.
I
BOOST
is the current through the Boost pin. Dynamic supply current is
higher due to the gate charge being delivered at the switching frequency.
See Typical Performance Characteristics and Applications Information
sections. The LT1160 = 1/2 LT1162.
Note 4:
See Timing Diagram. Gate rise times are measured from 2V to 10V
and fall times are measured from 10V to 2V. Delay times are measured
from the input transition to when the gate voltage has risen to 2V or
decreased to 10V.
相關PDF資料
PDF描述
LT1162CN Half-/Full-Bridge N-Channel Power MOSFET Drivers
LT1162CSW Half-/Full-Bridge N-Channel Power MOSFET Drivers
LT1162IN Half-/Full-Bridge N-Channel Power MOSFET Drivers
LT1162ISW Dual 1-of-4 Data Selectors/Multiplexers With 3-State Outputs 16-SOIC 0 to 70
LT1160CS TRANS PNP LF 400VCEO .1A TO-126
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