參數(shù)資料
型號(hào)： LSI53C895
英文描述： LSI53C895 PCI to Ultra2 SCSI I/O Processor with LVD Link Universal Transceivers technical manual v3.2 12/00
中文描述： LSI53C895 PCI到Ultra2的SCSI I / O處理器與內(nèi)徑鏈接通用收發(fā)器技術(shù)手冊(cè)v3.2版12/00
文件頁數(shù)： 98/166頁
文件大?。?/td> 1330K
代理商： LSI53C895
3-50
SAF-TE Source Code
How do we change the flags used
during compilation
Currently, the source code #Define statements must be
modified.
How are SCSI errors reported
Errors during a SCSI transfer or with a CDB are reported
by setting the appropriate check condition. Refer to Section
2.1.3 in the
LSI53C040 Enclosure Services Processor
SAF-TE Firmware User's Guide
for more information.
How are TWS errors reported
Invalid entries in
config
data structure, code load status
variable cl_status are set to CLS_FAILURE_XXX. The XXX
describes the failure and thus check conditions are set. The
initiator may retrieve information by issuing a Mode 4 Write
Buffer command with CDB[3] = 0xFF followed by a Request
Sense command.
Is Timer 2 utilized
Yes. Timer 2 is used to clock the transmission and
reception of data on the serial bus.
What is the difference between a soft
reset and a hard reset
A hard reset is a power on reset. The chip, all registers,
and external data memory are initialized using the contents
of the serial EEPROM. A soft reset occurs when the
watchdog timer expires. This forces only a chip reset. Note
the code restarts but not all of the registers are initialized.
See Chapter 2 in the
LSI53C040 Enclosure Services
Processor Technical Manual
for more information.
What is a shadow register and how is
it used
It holds a duplicate of a register value in xdata data
memory. Use of shadow registers allows for faster access
in some cases.
Prior to transferring the data sent by a
Mode 4 Write Buffer command over
the TWS bus, the byte count variable is
decremented by 1. Why
All Mode 4 Write Buffer commands require that the last
data byte transferred be the checksum of all previous data
bytes. However, this checksum is
not
data to be saved in
the serial EEPROM.
If the firmware is, say 10 Kbytes, but
our SCSI data buffer is only 1025
Bytes, how is the firmware updated
The Initiator, or an application program, must break the
firmware into segments and write one segment at a time.
See the discussion on
Section 3.4.2.3, “Firmware Update,”
page 3-33
for more information.
Table 3.18
Source Code Issues (Cont.)
Question
Comment
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參數(shù)描述
LSI53C895-208QFP-LEADFREE 制造商:LSI Corporation 功能描述:
LSI53C895A-208QFP 制造商:LSI Corporation 功能描述:Ultra SCSI Controller PCI/Flash Memory 208-Pin QFP
LSI53C895A208QFPLEADFREE 制造商:LSI Corporation 功能描述:
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LSI53C895A-272BGALEADFREE 制造商:LSI Corporation 功能描述:
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