參數(shù)資料
型號: LSI53C895
英文描述: LSI53C895 PCI to Ultra2 SCSI I/O Processor with LVD Link Universal Transceivers technical manual v3.2 12/00
中文描述: LSI53C895 PCI到Ultra2的SCSI I / O處理器與內徑鏈接通用收發(fā)器技術手冊v3.2版12/00
文件頁數(shù): 90/166頁
文件大?。?/td> 1330K
代理商: LSI53C895
3-42
SAF-TE Source Code
No Operation (0x08), loop again until ATN is low; Abort (0x06) and
Reset (0x0C); send an error message and terminate ISR; Other,
send a reject message to the host.
Once the ATN line is low, the ISR switches to SCSI command phase and
signals the Initiator to send the CDB. The subroutine
command_and_data_phases
is initiated. If this routine executes
successfully (returns FALSE), the SCSI status followed by a command
complete message is sent to the Initiator.
Function Name:
ir_external1()
Return Value: None.
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