參數(shù)資料
型號: LSI53C825AE
英文描述: LSI53C825AE single-chip PCI-SCSI controller
中文描述: LSI53C825AE單芯片的PCI - SCSI控制器
文件頁數(shù): 82/166頁
文件大小: 1330K
代理商: LSI53C825AE
3-34
SAF-TE Source Code
Table 3.9
Subroutine background_code_lode
cl_status is set:
by subroutine
background_code_load
CLS_SUCCESS
if the memory write over the TWS bus was
successful.
CLS_FAILURE_NVM
if the memory write over the TWS bus fails.
CLS_FAILURE_CHECKSUM
if the checksum over the data in code_buffer
fails.
CLS_FAILURE_ADDRESS
if the byte count plus the address exceed the
maximum image length (measured for the
inactive image).
Table 3.10
Subroutine do_code_load
cl_addr is set:
by subroutine
do_code_load
CLS_BUSY
if a valid Mode 4 Write Buffer command with
CDB[3] = 0 (load new data into external
memory), 0xFD (set the flag to update the
EEPROM) or 0xFE (set the flag to force a soft
Reboot (See notes on Register 0xFE00).
Note: The function
background_code_load
will disable interrupts and trip the watchdog
timer by using an infinite loop.
CLS_IDLE
if a valid Mode 4 Write Buffer command with
CDB[3] = 0xFF.
1. Note:
cl_status
is initialized (by
init_stuff
) to the value CLS_IDLE
2. Note: Mode 4 Write Buffer SCSI transfers require the code load status
variable (
cl_status
) be in the idle state (CLS_IDLE). Attempts to perform
SCSI transfers when the system is not idle result in a check condition.
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