參數(shù)資料
型號(hào): LSI53C825AE
英文描述: LSI53C825AE single-chip PCI-SCSI controller
中文描述: LSI53C825AE單芯片的PCI - SCSI控制器
文件頁(yè)數(shù): 21/166頁(yè)
文件大小: 1330K
代理商: LSI53C825AE
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8051/8032 Background
2-5
The
AREGS
control causes the compiler to use absolute addressing for
registers R0 through R7. Absolute addressing improves the efficiency of
the generated code.
PUSH
and
POP
instructions function only with direct
or absolute addresses. By using the
AREGS
directive, functions can
directly push and pop registers.
The
NOAREGS
control disables absolute addressing for registers R0
through R7. Functions that are compiled with
NOAREGS
are not
dependent on the register bank and may use all 8051 register banks.
This directive may be used for functions that are called from other
functions using different register banks.
The
REGISTERBANK
control selects the specific register bank to use
for subsequent functions declared in the source file. Resulting code may
use the absolute form of register access when the absolute register
number can be computed. The
using
function attribute supersedes the
effects of the
REGISTERBANK
directive.
The
SMALL
memory model is used to compile the firmware for
performance reasons. This results in all function variables and local data
segments being placed in the internal data memory of the 8032 by
default. This results in smaller code size and faster execution. Since the
internal memory size is very limited (256 bytes), larger or infrequently
used variables may be declared to be in any of the 8032 memory ranges.
Since this is the compiler’s default memory model, a
#pragma small
is
not needed in the source file, and
SMALL
does not have to be on the
C51 command line.
2.1.2.2 Compiler Keywords
A list of compiler keywords are:
_at_
variables may be located at absolute memory locations in the C
program source modules using the
_at_
keyword.
sbit
the
sbit
data type allows the user to access bit-addressable SFRs.
data
directly accessible internal data memory; fastest access to variables
(128 bytes).
bdata
bit-addressable internal data memory; allows mixed bit and byte
access (16 bytes).
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LSI53C860 LSI53C860 PCI to Ultra SCSI I/O Processor technical manual v2.1 4/01
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LSI53C875A LSI53C875A PCI to Ultra SCSI Controller technical manual v2.0 12/00
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