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參數(shù)資料
| 型號： | LS7166 |
| 廠商： | LSI Corporation |
| 元件分類： | 通用總線功能 |
| 英文描述： | 24-BIT QUADRATURE COUNTER |
| 中文描述： | 24位正交計數(shù)器 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 79K |
| 代理商： | LS7166 |
I/O DESCRIPTION:
(See REGISTER DESCRIPTION for I/O Prgramming.)
Data-Bus (D0-D7) (Pin 8-Pin 15).
The 8-line data bus is a
three-state I/O bus for interfacing with the system bus.
CS (Chip Select Input) (Pin 2).
A logical "0" at this input en-
ables the chip for Read and Write.
RD (Read Input) (Pin 19)
. A logical "0" at this input enables the
OSR and the OL to be read on the data bus.
WR (Write Input) (Pin 1)
A logical "0" at this input enables the
data bus to be written into the control and data registers.
C/D (Control/Data Input) (Pin 18).
A logical "1" at this input en-
ables a control word to be written into one of the four control
registers or the OSR to be read on the I/O bus. A logical "0" en-
ables a data word to be written into the PR, or the OL to be read
on the I/O bus.
A (Pin 6).
Input A is a programmable count input capable of
functioning in three different modes, such as up count input,
down count input and quadrature input.
B (Pin 7).
Input B is also a programmable count input that can
be programmed to function either as down count input, or count
direction control gate for input A, or quadrature input. When B is
programmed as count direction control gate, B = 0 enables A as
the Up Count input and B = 1 enables A as the Down Count in-
put. When programmed as the direction input, B can switch
state only when A is high.
ABGT/RCTR (PIN 4).
This input can be programmed to func-
tion as either inputs A and B enable gate or as external counter
reset input. A logical "0" is the active level on this input.
DC Electrical Characteristics
. (All voltages referenced to V
SS
.
TA = 0 to 70C, V
DD
= 4.5V to 5.5V, fc = 0, unless otherwise specified)
Parameter Symbol Min. Value Max.Value Unit Remarks
Supply Voltage V
DD
4.5
Supply Current
I
DD
-
Input Low Voltage
V
IL
0
Input High Voltage
V
IH
2.0
Output Low Voltage
V
OL
-
Output High Voltage
V
OH
2.5
Input Current
-
-
5.5
350
0.8
V
DD
0.4
-
15
Volts
μA
Volts
Volts
Volts
Volts
nA
-
Outputs open
-
-
4mA Sink
200μA Source
Leakage
Current
V
OH
= 2.5V
V
OL
= 0.4V
Output Source Current
Output Sink Current
Data Bus Off-State
Leakage Current
I
SRC
200
I
SINK
-
-
μA
mA
4
-
-
15
nA
-
Absolute Maximum Ratings:
Parameter Symbol Values Unit
Voltage at any input
V
IN
Operating Temperature
T
A
Storage Temperature
T
STG
Supply Voltage
V
DD -
V
SS
+7.0
V
SS
- 0.3 to V
DD
+ 0 .3
0 to +70
-65 to +150
Volts
oC
oC
Volts
In non-quadrature mode, if Pin 4 is programmed as A and B en-
able gate input, it may switch state only when A is high (if A is
clock and B is direction) or when both A and B are high (if A
and B are clocks. In quadrature mode, if Pin 4 is programmed
as A and B enable gate, it may switch state only when either A
or B switches.
LCTR/LLTC (PIN 3)
. This input can be programmed to func-
tion as the external load command input for either the CNTR or
the OL. When programmed as counter load input, the counter
is loaded with the data contained in the PR. When pro-
grammed as the OL load input, the OL is loaded with data con-
tained in the CNTR. A logical "0" is the active level on this in-
put.
CY (Pin 16).
This output can be programmed to serve as one
of the following:
A. CY. Complemented Carry out (active "0").
B. CY. True Carry out (active "1").
C. CYT. Carry Toggle flip-flop out.
D. COMP. Comparator out (active "0")
BW (Pin 17).
This output can be programmed to serve as one
of the following:
A. BW. Complemented Borrow out (active "0").
B. BW. True Borrow out (active "1").
C. BWT. Borrow Toggle flip-flop out.
D. COMPT. Comparator Toggle output.
V
DD
(Pin 5).
Supply voltage positive terminal.
V
SS
(Pin 20).
Supply voltage negative terminal.
7166-111299-5
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