參數(shù)資料
型號(hào)： LRS1806A
英文描述： Flash ROM
中文描述： 閃存ROM
文件頁(yè)數(shù)： 21/45頁(yè)
文件大?。?/td> 1382K
代理商： LRS1806A
LRS1806A
19
DC Electrical Characteristics (Continue)
(T
A
= -30°C to +85°C, F-V
CC
= 2.7V to 3.3V, S-V
CC
= 2.7V to 3.1V)
Notes
Min.
Typ.
Max.
Unit
Notes:
1. V
CC
includes both F-V
CC
and S-V
CC
.
2. All currents are in RMS unless otherwise noted. Typical values are the reference values at V
CC
= 3.0V and T
A
= +25
°
C
unless V
CC
is specified.
3. I
CCWS
and I
CCES
are specified with the device de-selected. If read or (page buffer) program while in block erase suspend
mode, the device’s current draw is the sum of I
CCWS
or I
CCES
and I
CCR
or I
CCW
, respectively.
4. Block erase, full chip erase, (page buffer) program are inhibited when F-V
PP
≤
V
PPLK
, and not guaranteed in the range
between V
PPLK
(max.) and V
PPH1
(min.) , between V
PPH1
(max.) and V
PPH2
(min.) and above V
PPH2
(max.).
5. The Automatic Power Savings (APS) feature automatically places the device in power save mode after read cycle
completion. Standard address access timings (t
AVQV
) provide new data when addresses are changed.
6. Sampled, not 100% tested.
7. F-V
PP
is not used for power supply pin. With F-V
PP
≤
V
PPLK
, block erase, full chip erase, (page buffer) program cannot be
executed and should not be attempted.
Applying 12V ±0.3V to F-V
PP
provides fast erasing or fast programming mode. In this mode, F-V
PP
is power supply pin
and supplies the memory cell current for block erasing and (page buffer) programming. Use similar power supply trace
widths and layout considerations given to the V
CC
power bus.
Applying 12V ±0.3V to F-V
PP
during erase/program can only be done for a maximum of 1000 cycles on each block.
F-V
PP
may be connected to 12V ±0.3V for a total of 80 hours maximum.
8. Memory cell data is held. (S-CE
2
= “V
IH
”)
9. Memory cell data is not held. (S-CE
2
= “V
IL
”)
10. The operating current in dual work is the sum of the operating current (read, erase, program) in each plane.
11. Includes F-RY/BY.
Symbol
I
SB
I
SLP
I
CC1
I
CC2
V
IL
Parameter
Conditions
S-V
CC
Standby Current
S-V
CC
Sleep Mode Current
S-V
CC
Operation Current
S-V
CC
Operation Current
8
80
μA
S-CE
1
≥
S-V
CC
- 0.2V
S-CE
2
≤
0.2V
t
CYCLE
= Min., I
I/O
= 0mA
t
CYCLE
= 1μs, I
I/O
= 0mA
9
15
μA
20
mA
3
mA
Input Low Voltage
6
-0.3
V
CC
-0.3
0.3
V
CC
+0.3
0.3
V
V
IH
Input High Voltage
6
V
V
OL
Output Low Voltage
6,11
V
I
OL
= 0.5mA
V
OH
Output High Voltage
6
V
CC
-0.3
V
I
OH
= -0.5mA
V
PPLK
F-V
PP
Lockout during Normal
Operations
F-V
PP
during Block Erase, Full Chip
Erase,(PageBuffer) Program
F-V
PP
during Block Erase,
(PageBuffer) Program
F-V
CC
Lockout Voltage
4,6,7
0.4
V
V
PPH1
7
1.65
3
3.3
V
V
PPH2
7
11.7
12
12.3
V
V
LKO
1.5
V
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