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參數(shù)資料
| 型號： | LRI512-C40 |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | EEPROM |
| 中文描述： | EEPROM的 |
| 文件頁數(shù)： | 16/54頁 |
| 文件大?。?/td> | 351K |
| 代理商： | LRI512-C40 |
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LRI512
16/54
LRI512 PROTOCOL DESCRIPTION
The Transmission protocol defines the mecha-
nism to exchange instructions and data between
the VCD and the LRI512, in both directions.
It is based on the concept of “VCD talks first”.
This means that any LRI512 does not start trans-
mitting unless it has received and properly decod-
ed an instruction sent by the VCD.
The protocol is based on an exchange of
– a Request from the VCD to the LRI512
– a Response from the LRI512 to the VCD
Each Request and each Response is contained in
a Frame. The frame delimiters (SOF, EOF) are de-
scribed in the previous paragraphs.
Each Request consists of
– Request SOF (see Figure 9 and Figure 10)
– Flags
– A Command Code
– Parameters, depending on the Command
– Application data
– 2-byte CRC
– Request EOF (see Figure 11)
Each Response consists of
– Answer SOF (see Figure 20 to Figure 23)
– Flags
– Parameters, depending on the Command
– Application data
– 2-byte CRC
– Answer EOF (see Figure 24 to Figure 27)
The protocol is bit-oriented. The number of bits
transmitted in a frame is a multiple of eight (8) –
that is, an integer number of bytes.
A single-byte field is transmitted Least Significant
Bit (LSBit) first.
A multiple-byte field is transmitted Least Signifi-
cant Byte (LSByte) first, each byte is transmitted
Least Significant Bit (LSBit) first.
The setting of the flags indicates the presence of
the optional fields. When the flag is set (to one),
the field is present. When the flag is reset (to zero),
the field is absent.
Table 7. VCD Request Frame Format
Table 8. LRI512
Response Frame Format
Figure 29. LRI512 Protocol Timing
Request
SOF
Request Flags
Command Code
Parameters
Data
2 Bytes
CRC
Request
EOF
Response
SOF
Response
Flags
Parameters
Data
2 Bytes
CRC
Response
EOF
AI06830
VCD
Request Frame
(Table 7)
Request Frame
(Table 7)
LRI512
Response Frame
(Table 8)
Response Frame
(Table 8)
Timing
t1
t2
t1
t2
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| LRI64-A1S | Memory TAG IC, 64-bit Unique ID with WORM User Area 13.56MHz, ISO 15693 Standard Compliant |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LRI64 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Memory TAG IC, 64-bit Unique ID with WORM User Area 13.56MHz, ISO 15693 Standard Compliant |
| LRI64_07 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Memory TAG IC at 13.56 MHz, with 64-bit Unique ID and WORM user area, ISO15693 and ISO18000-3 Mode 1 compliant |
| LRI64_08 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Memory tag IC at 13.56 MHz, with 64-bit unique ID and WORM user area, ISO 15693 and ISO 18000-3 Mode 1 compliant |
| LRI64-A1S | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Memory TAG IC, 64-bit Unique ID with WORM User Area 13.56MHz, ISO 15693 Standard Compliant |
| LRI64-A1S/1GE | 功能描述:電可擦除可編程只讀存儲器 TAG IC 13.56 MHz W/ 64-bit Unique ID RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
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