參數(shù)資料
型號(hào): LPC3180
廠商: NXP Semiconductors N.V.
英文描述: 16/32-bit ARM microcontroller; hardware floating-point coprocessor, USB On-The-Go, and SDRAM memory interface
中文描述: 16/32位ARM微控制器,硬件的浮點(diǎn)協(xié)處理器的USB On - The - Go的,和SDRAM存儲(chǔ)器接口
文件頁(yè)數(shù): 15/36頁(yè)
文件大?。?/td> 188K
代理商: LPC3180
LPC3180_1
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01 — 2 June 2006
15 of 36
Philips Semiconductors
LPC3180
16/32-bit ARM microcontroller with external memory interface
6.3 AHB matrix
The microcontroller has a multi-layer AHB matrix for inter-block communication. AHB is
the ARM high-speed bus, which is part of the ARM bus architecture. AHB is a
high-bandwidth low-latency bus that supports multi-master arbitration and a bus
grant/request mechanism. For systems where there is only one bus master (the CPU), or
where there are two masters (CPU and DMA) and the CPU does not generally need to
contend with the DMA for program memory access (because the CPU has access to
memory on its local bus or has caches or another AHB bus etc.), this arrangement works
well. However, if there are multiple bus masters and the CPU needs access to external
memory, a single AHB bus can cause a bottleneck. ARM’s solution to this was to invent a
multi-layer AHB which replaces the request/grant and arbitration mechanism with a
multiplexer fabric that pushes arbitration to the level of the devices. Thus, if a CPU and a
DMA controller want access to the same memory, the multi-layer fabric will arbitrate
between the two on granting access to that memory. This allows simultaneous access by
bus masters to different resources at the cost of increased arbitration complexity. As with
all trade-offs, the pros and cons must be analyzed, for a microcontroller operating at
200 MHz, removing guaranteed central arbitration in case more than one bus master is
active in favor of occasional local arbitration gives better performance.
The blocks outside the CPU can be roughly split into memory controllers, serial
communication, I/O, timers/counters and RTC, system control, and debug and trace
blocks. These are described as follows.
6.4 On-chip SRAM
On-chip SRAM may be used for code and/or data storage. The SRAM may be accessed
as 8/16/32 bit. The LPC3180 provides 64 kB of SRAM.
6.5 Memory map
The LPC3180 memory map incorporates several distinct regions, as shown in
Figure 3
.
When an application is running, the CPU interrupt vectors are re-mapped to allow them to
reside in on-chip SRAM.
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LPC3180FEL320,551 功能描述:ARM微控制器 - MCU ARM9 FLTNG PNT CO-PR FLTNG POINT CO-PROC RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
LPC3180FEL320/01 制造商:NXP Semiconductors 功能描述:MCU 16-Bit/32-Bit LPC3100 ARM926EJ-S RISC ROMLess 1.2V/1.8V/3.3V 320-Pin LFBGA Tray
LPC3180FEL320/01,5 功能描述:ARM微控制器 - MCU ARM9 64KRAM VFP USB OTG BGA320 RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT