參數(shù)資料
型號: LPC2921FBD100
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: ARM9 microcontroller with CAN, LIN, and USB
中文描述: 32-BIT, FLASH, 125 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT407-1, LQFP-100
文件頁數(shù): 34/84頁
文件大?。?/td> 551K
代理商: LPC2921FBD100
LPC2921_23_25_3
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 14 April 2010
34 of 84
NXP Semiconductors
LPC2921/2923/2925
ARM9 microcontroller with CAN, LIN, and USB
Remark:
The IDX0 function for the QEI, the external start function for ADC1, and the
TRAP0/1 functions for the PWM0/1 are not pinned out on the LPC2921/2923/2925.
6.14.3
Clock description
The MSCSS is clocked from a number of different sources:
CLK_SYS_MSCSS_A clocks the AHB side of the AHB-to-APB bus bridge
CLK_MSCSS_APB clocks the subsystem APB bus
CLK_MSCSS_MTMR0/1 clocks the timers
CLK_MSCSS_PWM[0:3] clocks the PWMs.
Each ADC has two clock areas; an APB part clocked by CLK_MSCSS_ADCx_APB (x = 1
or 2) and a control part for the analog section clocked by CLK_ADCx = 1 or 2), see
Section 6.7.2
.
All clocks are derived from the BASE_MSCSS_CLK, except for CLK_SYS_MSCSS_A
which is derived form BASE_SYS_CLK, and the CLK_ADCx clocks which are derived
from BASE_CLK_ADC. If specific PWM or ADC modules are not used their corresponding
clocks can be switched off.
6.14.4
Analog-to-digital converter
The MSCSS in the LPC2921/2923/2925 includes two 10-bit successive-approximation
analog-to-digital converters.
The key features of the ADC interface module are:
ADC1 and ADC2: Eight analog inputs; time-multiplexed; measurement range up to
3.3 V.
External reference-level inputs.
400 ksamples per second at 10-bit resolution up to 1500 ksamples per second at 2-bit
resolution.
Programmable resolution from 2-bit to 10-bit.
Single analog-to-digital conversion scan mode and continuous analog-to-digital
conversion scan mode.
Optional conversion on transition on external start input, timer capture/match signal,
PWM_sync or ‘previous’ ADC.
Converted digital values are stored in a register for each channel.
Optional compare condition to generate a ‘less than’ or an ‘equal to or greater than’
compare-value indication for each channel.
Power-down mode.
6.14.4.1
Functional description
The ADC block diagram,
Figure 6
, shows the basic architecture of each ADC. The ADC
functionality is divided into two major parts; one part running on the MSCSS Subsystem
clock, the other on the ADC clock. This split into two clock domains affects the behavior
from a system-level perspective. The actual analog-to-digital conversions take place in the
ADC clock domain, but system control takes place in the system clock domain.
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LPC2921FBD100,551 功能描述:ARM微控制器 - MCU IC ARM9 MCU FLASH 128KB RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
LPC2923 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ARM9 microcontroller with CAN, LIN, and USB
LPC2923FBD100 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ARM9 microcontroller with CAN, LIN, and USB device
LPC2923FBD100,551 功能描述:ARM微控制器 - MCU IC ARM9 MCU FLASH 256KB RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
LPC2925 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ARM9 microcontroller with CAN, LIN, and USB