參數(shù)資料
型號: LPC2888
廠商: NXP Semiconductors N.V.
英文描述: 16/32-bit ARM microcontrollers; 8 kB cache, up to 1 MB flash, Hi-Speed USB 2.0 device, and SDRAM memory interface
中文描述: 16/32位ARM微控制器; 8 KB的高速緩存,高達(dá)1 MB閃存,高速USB 2.0設(shè)備,SDRAM存儲器接口
文件頁數(shù): 24/34頁
文件大?。?/td> 139K
代理商: LPC2888
LPC2880_LPC2888_1
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01 — 22 June 2006
24 of 34
Philips Semiconductors
LPC2880; LPC2888
16/32-bit ARM microcontrollers with external memory interface
6.20.4
PLLs
The LPC2880/LPC2888 includes two PLLs: a low power PLL that may be used to provide
clocks to most chip functions; a high-speed PLL that may be used to generate faster
clocks for selected chip functions, if needed. Each PLL can be driven from several clock
sources. These include the main oscillator (1 MHz to 20 MHz), the RTC oscillator
(32 kHz), the bit clock or word select inputs of the I
2
S input channel, the clock input from
the SD/MMC Card interface, or the output clock from the other PLL.
The low power PLL takes the input clock and multiplies it up to a higher frequency (by 1 to
32), then divides it down (by 1, 2, 4, or 8) to provide the output clock used by the CGU.
The output frequency of this PLL can range from 9.75 MHz to 160 MHz. Functional blocks
may have limitations below this upper limit.
The high-speed PLL takes the input clock, optionally divides it down (by 1 to 256), then
multiplies it up to a higher frequency (by 1 to 1024), then divides it down (by 1 to 16) to
provide the output clock used by the CGU. The output frequency of this PLL can range
from 17 MHz to 550 MHz. Functional blocks may have limitations below this upper limit.
6.20.5
Power control and modes
Power control on the LPC2880/LPC2888 is accomplished by detailed control over the
clocking of each functional block via the CGU. The LPC2880/LPC2888 includes a very
versatile clocking scheme that provides a great deal of control over performance and
power usage.
On-chip functions are divided into 11 groups. Each group has a selection for one of
several basic clock sources. Graceful (glitch-free) switching between these clock sources
is provided.
Three of these functional groups include a fractional divider that allows any rate below the
selected clock to be derived. Three other functional groups include more than one
fractional divider (up to six), allowing several different clock rates to be generated within
the group. Each function within the group can then be assigned to use any one of the
generated clocks.
Each function within any group can also be individually turned off by disabling the clock to
that function. When added to the versatile clock rate selection, this allows very detailed
control of power utilization.
Each function also can be configured to have clocks automatically turned on and off
based on a signal from the Event Router.
6.20.6
APB bus
Many peripheral functions are accessed by on-chip APB buses that are attached to the
higher speed AHB bus. The APB bus performs reads and writes to peripheral registers in
three peripheral clocks.
6.21 Emulation and debugging
The LPC2880/LPC2888 supports emulation via a dedicated JTAG serial port. The
dedicated JTAG port allows debugging of all chip features without impact to any pins that
may be used in the application.
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LPC2888FET180 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16/32-bit ARM microcontrollers; 8 kB cache, up to 1 MB flash, Hi-Speed USB 2.0 device, and SDRAM memory interface
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LPC2888FET180/01 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16/32-bit ARM microcontrollers; 8 kB cache, up to 1 MB flash, Hi-Speed USB 2.0 device, and SDRAM memory interface
LPC2888FET180/01,5 功能描述:ARM微控制器 - MCU 16/32 bit micro RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
LPC2888FET180/D,55 制造商:NXP Semiconductors 功能描述:PHALPC2888FET180/D.551 32BIT ARM7 HS USB