參數(shù)資料
型號(hào)： LPC2378
廠商： NXP Semiconductors N.V.
英文描述： Single-chip 16-bit/32-bit microcontrollers; 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC
中文描述： 單芯片16-bit/32-bit微控制器，512的ISP /國(guó)際檢察官聯(lián)合會(huì)，以太網(wǎng)，USB 2.0，CAN和10 kB閃存位的ADC / DAC
文件頁(yè)數(shù)： 20/54頁(yè)
文件大?。?/td> 203K
代理商： LPC2378
LPC2378_1
NXP B.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01 — 6 December 2006
20 of 54
NXP Semiconductors
LPC2378
Fast communication chip
An interrupt to the processor can be generated on a DMA completion or when a DMA
error has occurred.
Interrupt masking. The DMA error and DMA terminal count interrupt requests can be
masked.
Raw interrupt status. The DMA error and DMA count raw interrupt status can be read
prior to masking.
7.9 Fast general purpose parallel I/O
Device pins that are not connected to a specific peripheral function are controlled by the
GPIO registers. Pins may be dynamically configured as inputs or outputs. Separate
registers allow setting or clearing any number of outputs simultaneously. The value of the
output register may be read back as well as the current state of the port pins.
LPC2378 use accelerated GPIO functions:
GPIO registers are relocated to the ARM local bus so that the fastest possible I/O
timing can be achieved.
Mask registers allow treating sets of port bits as a group, leaving other bits
unchanged.
All GPIO registers are byte and half-word addressable.
Entire port value can be written in one instruction.
Additionally, any pin on PORT0 and PORT2 (total of 46 pins) providing a digital function
can be programmed to generate an interrupt on a rising edge, a falling edge, or both. The
edge detection is asynchronous, so it may operate when clocks are not present such as
during Power-down mode. Each enabled interrupt can be used to wake up the chip from
Power-down mode.
7.9.1
Features
Bit level set and clear registers allow a single instruction to set or clear any number of
bits in one port.
Direction control of individual bits.
All I/O default to inputs after reset.
Backward compatibility with other earlier devices is maintained with legacy PORT0
and PORT1 registers appearing at the original addresses on the APB bus.
7.10 Ethernet
The Ethernet block contains a full featured 10 Mbit/s or 100 Mbit/s Ethernet MAC
designed to provide optimized performance through the use of DMA hardware
acceleration. Features include a generous suite of control registers, half or full duplex
operation, flow control, control frames, hardware acceleration for transmit retry, receive
packet filtering and wake-up on LAN activity. Automatic frame transmission and reception
with scatter-gather DMA off-loads many operations from the CPU.
The Ethernet block and the CPU share a dedicated AHB subsystem that is used to access
the Ethernet SRAM for Ethernet data, control, and status information. All other AHB traffic
in the LPC2378 takes place on a different AHB subsystem, effectively separating Ethernet
activity from the rest of the system. The Ethernet DMA can also access off-chip memory
相關(guān)PDF資料
PDF描述
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LPC2880 16/32-bit ARM microcontrollers; 8 kB cache, up to 1 MB flash, Hi-Speed USB 2.0 device, and SDRAM memory interface
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LPC2378FBD144 制造商:NXP Semiconductors 功能描述:MCU 32BIT ARM7 10/100 USB CAN 制造商:NXP Semiconductors 功能描述:MCU 32BIT ARM7, 10/100, USB, CAN
LPC2378FBD144,551 功能描述:ARM微控制器 - MCU ARM7 512KF/USB/ENET RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
LPC2378FBD144/CP32 制造商:NXP Semiconductors 功能描述:- Trays
LPC2378FBD144/CP3E 制造商:NXP Semiconductors 功能描述:
LPC2378FBD144551 制造商:NXP Semiconductors 功能描述:IC 32BIT MCU ARM7 72MHZ LQFP-144
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