參數(shù)資料
型號: LPC2364FBD100
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學(xué)處理器
英文描述: ARM7 with 128 kB flash, 34 kB SRAM, Ethernet, USB 2.0 Device, CAN, and 10-bit ADC
封裝: LPC2364FBD100<SOT407-1 (LQFP100)|<<http://www.nxp.com/packages/SOT407-1.html<1<Always Pb-free,;
文件頁數(shù): 65/69頁
文件大?。?/td> 517K
代理商: LPC2364FBD100
LPC2364_65_66_67_68
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 20 October 2011
65 of 69
NXP Semiconductors
LPC2364/65/66/67/68
Single-chip 16-bit/32-bit microcontrollers
LPC2364_65_66_67_68 v.6
Modifications:
20100201
Table 5 “Limiting values”: Changed V
ESD
min/max to
2500/+2500.
Table 6: Updated min, typical and max values for oscillator pins.
Table 6: Updated conditions and typical values for I
DD(DCDC)pd(3V3)
, I
BATact
;
I
DD(DCDC)dpd(3V3)
and I
BAT
added.
Table 9 “Dynamic characteristics of flash”: Changed flash endurance spec from
100000 to 10000 minimum cycles.
Added Table 11 “DAC electrical characteristics”.
Section 7.2 “On-chip flash programming memory”: Removed text regarding flash
endurance minimum specs.
Added Section 7.24.4.4 “Deep power-down mode”.
Section 7.25.2 “Brownout detection”: Changed V
DD(3V3)
to V
DD(DCDC)(3V3)
.
Added Section 9.2 “Deep power-down mode”.
Added Section 13.2 “XTAL1 input”.
Added Section 13.3 “XTAL and RTC Printed-Circuit Board (PCB) layout guidelines”.
Added table note for XTAL1 and XTAL2 pins in Table 3.
20090409
Product data sheet
Added part LPC2364HBD100.
Section 7.2: Added sentence clarifying SRAM speeds for LPC2364HBD.
Table 5: Updated V
esd
min/max.
Table 6: Updated Z
DRV
Table note [14].
Table 6: V
hys
, moved 0.4 from typ to min column.
Table 6: I
pu
, added specs for >85
C.
Table 6: Removed R
pu
.
Table 7: CCLK and IRC, added specs for >85
C.
Added Table 9.
Updated Figure 14.
Updated Figure 11.
20080417
Product data sheet
20071220
Product data sheet
20071001
Preliminary data sheet
20070103
Preliminary data sheet
Product data sheet
-
LPC2364_65_66_67_68 v.5
LPC2364_65_66_67_68 v.5
Modifications:
-
LPC2364_65_66_67_68 v.4
LPC2364_65_66_67_68 v.4
LPC2364_66_68 v.3
LPC2364_66_68 v.2
LPC2364_66_68 v.1
-
-
-
-
LPC2364_66_68 v.3
LPC2364_66_68 v.2
LPC2364_66_68 v.1
-
Table 20.
Document ID
Revision history
…continued
Release date
Data sheet status
Change
notice
Supersedes
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