參數(shù)資料
型號: LPC1317FBD64,551
廠商: NXP Semiconductors
文件頁數(shù): 62/77頁
文件大小: 0K
描述: IC MCU 32BIT 64KB FLASH 64LQFP
標(biāo)準(zhǔn)包裝: 160
系列: LPC13xx
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 72MHz
連通性: I²C,Microwire,SPI,SSI,SSP,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,WDT
輸入/輸出數(shù): 51
程序存儲器容量: 64KB(64K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 10K x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-LQFP
包裝: 托盤
其它名稱: 568-9596
LPC1315_16_17_45_46_47
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 20 September 2012
65 of 77
NXP Semiconductors
LPC1315/16/17/45/46/47
32-bit ARM Cortex-M3 microcontroller
12.5 Reset pad configuration
12.6 ADC usage notes
The following guidelines show how to increase the performance of the ADC in a noisy
environment beyond the ADC specifications listed in Table 17:
The ADC input trace must be short and as close as possible to the
LPC1315/16/17/45/46/47 chip.
The ADC input traces must be shielded from fast switching digital signals and noisy
power supply lines.
Because the ADC and the digital core share the same power supply, the power supply
line must be adequately filtered.
To improve the ADC performance in a very noisy environment, put the device in Sleep
mode during the ADC conversion.
Remark: On the LQFP64 package, the analog power supply and the reference voltage
can be connected on separate pins for better noise immunity.
Fig 33. Reset pad configuration
VSS
reset
002aaf274
VDD
Rpu
ESD
20 ns RC
GLITCH FILTER
PIN
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