參數資料
型號: LPC1317FBD64,551
廠商: NXP Semiconductors
文件頁數: 1/77頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 64KB FLASH 64LQFP
標準包裝: 160
系列: LPC13xx
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 72MHz
連通性: I²C,Microwire,SPI,SSI,SSP,UART/USART
外圍設備: 欠壓檢測/復位,POR,WDT
輸入/輸出數: 51
程序存儲器容量: 64KB(64K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 10K x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 3.6 V
數據轉換器: A/D 8x12b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-LQFP
包裝: 托盤
其它名稱: 568-9596
1.
General description
The LPC1315/16/17/45/46/47 are ARM Cortex-M3 based microcontrollers for embedded
applications featuring a high level of integration and low power consumption. The ARM
Cortex-M3 is a next generation core that offers system enhancements such as enhanced
debug features and a higher level of support block integration.
The LPC1315/16/17/45/46/47 operate at CPU frequencies of up to 72 MHz. The ARM
Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with
separate local instruction and data buses as well as a third bus for peripherals. The ARM
Cortex-M3 CPU also includes an internal prefetch unit that supports speculative
branching.
Equipped with a highly flexible and configurable Full-Speed USB 2.0 device controller
available on the LPC1345/46/47, this series brings unparalleled design flexibility and
seamless integration to today’s demanding connectivity solutions.
The peripheral complement of the LPC1315/16/17/45/46/47 includes up to 64 kB of flash
memory, 8 kB or 10 kB of SRAM data memory, one Fast-mode Plus I2C-bus interface, one
RS-485/EIA-485 USART with support for synchronous mode and smart card interface,
two SSP interfaces, four general purpose counter/timers, an 8-channel, 12-bit ADC, and
up to 51 general purpose I/O pins.
2.
Features and benefits
System:
ARM Cortex-M3 r2p1 processor, running at frequencies of up to 72 MHz.
ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).
Non Maskable Interrupt (NMI) input selectable from several input sources.
System tick timer.
Memory:
Up to 64 kB on-chip flash program memory with a 256 byte page erase function.
In-System Programming (ISP) and In-Application Programming (IAP) via on-chip
bootloader software. Flash updates via USB supported.
Up to 4 kB on-chip EEPROM data memory with on-chip API support.
Up to 12 kB SRAM data memory.
16 kB boot ROM with API support for USB API, power control, EEPROM, and flash
IAP/ISP.
LPC1315/16/17/45/46/47
32-bit ARM Cortex-M3 microcontroller; up to 64 kB flash;
up to 12 kB SRAM; USB device; USART; EEPROM
Rev. 3 — 20 September 2012
Product data sheet
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