參數(shù)資料
型號: LPC11U14FET48/201,
廠商: NXP Semiconductors
文件頁數(shù): 12/72頁
文件大小: 0K
描述: IC MCU 32BIT 32K 48TFBGA
產(chǎn)品培訓(xùn)模塊: Code Density for LPC11xx
標(biāo)準(zhǔn)包裝: 490
系列: LPC11Uxx
核心處理器: ARM? Cortex?-M0
芯體尺寸: 32-位
速度: 50MHz
連通性: I²C,Microwire,智能卡,SPI,SSP,UART/USART,USB
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,WDT
輸入/輸出數(shù): 40
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 6K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-TFBGA
包裝: 托盤
其它名稱: 568-8578
LPC11U1X
All information provided in this document is subject to legal disclaimers.
NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2.2 — 11 March 2014
2 of 72
NXP Semiconductors
LPC11U1x
32-bit ARM Cortex-M0 microcontroller
Up to 40 General Purpose I/O (GPIO) pins with configurable pull-up/pull-down
resistors, repeater mode, input inverter, and open-drain mode. Eight pins support a
programmable glitch filter.
Up to 8 GPIO pins can be selected as edge and level sensitive interrupt sources.
Two GPIO grouped interrupt modules enable an interrupt based on a
programmable pattern of input states of a group of GPIO pins.
High-current source output driver (20 mA) on one pin (P0_7).
High-current sink driver (20 mA) on true open-drain pins (P0_4 and P0_5).
Four general purpose counter/timers with a total of up to 5 capture inputs and 13
match outputs.
Programmable Windowed WatchDog Timer (WWDT) with a dedicated, internal
low-power WatchDog Oscillator (WDO).
Analog peripherals:
10-bit ADC with input multiplexing among eight pins.
Serial interfaces:
USB 2.0 full-speed device controller.
USART with fractional baud rate generation, internal FIFO, a full modem control
handshake interface, and support for RS-485/9-bit mode and synchronous mode.
USART supports an asynchronous smart card interface (ISO 7816-3).
Two SSP controllers with FIFO and multi-protocol capabilities.
I2C-bus interface supporting the full I2C-bus specification and Fast-mode Plus with
a data rate of up to 1 Mbit/s with multiple address recognition and monitor mode.
Clock generation:
Crystal Oscillator with an operating range of 1 MHz to 25 MHz (system oscillator).
12 MHz high-frequency Internal RC oscillator (IRC) that can optionally be used as
a system clock.
Internal low-power, low-frequency WatchDog Oscillator (WDO) with programmable
frequency output.
PLL allows CPU operation up to the maximum CPU rate with the system oscillator
or the IRC as clock sources.
A second, dedicated PLL is provided for USB.
Clock output function with divider that can reflect the crystal oscillator, the main
clock, the IRC, or the watchdog oscillator.
Power control:
Four reduced power modes: Sleep, Deep-sleep, Power-down, and Deep
power-down.
Power profiles residing in boot ROM allow optimized performance and minimized
power consumption for any given application through one simple function call.
Processor wake-up from Deep-sleep and Power-down modes via reset, selectable
GPIO pins, watchdog interrupt, or USB port activity.
Processor wake-up from Deep power-down mode using one special function pin.
Integrated PMU (Power Management Unit) to minimize power consumption during
Sleep, Deep-sleep, Power-down, and Deep power-down modes.
Power-On Reset (POR).
Brownout detect with four separate thresholds for interrupt and forced reset.
Unique device serial number for identification.
Single 3.3 V power supply (1.8 V to 3.6 V).
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