參數(shù)資料
型號(hào): LPC11U14FET48/201,
廠(chǎng)商: NXP Semiconductors
文件頁(yè)數(shù): 1/72頁(yè)
文件大?。?/td> 0K
描述: IC MCU 32BIT 32K 48TFBGA
產(chǎn)品培訓(xùn)模塊: Code Density for LPC11xx
標(biāo)準(zhǔn)包裝: 490
系列: LPC11Uxx
核心處理器: ARM? Cortex?-M0
芯體尺寸: 32-位
速度: 50MHz
連通性: I²C,Microwire,智能卡,SPI,SSP,UART/USART,USB
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,WDT
輸入/輸出數(shù): 40
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類(lèi)型: 閃存
RAM 容量: 6K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-TFBGA
包裝: 托盤(pán)
其它名稱(chēng): 568-8578
1.
General description
The LPC11U1x are an ARM Cortex-M0 based, low-cost 32-bit MCU family, designed for
8/16-bit microcontroller applications, offering performance, low power, simple instruction
set and memory addressing together with reduced code size compared to existing 8/16-bit
architectures.
The LPC11U1x operate at CPU frequencies of up to 50 MHz.
Equipped with a highly flexible and configurable Full Speed USB 2.0 device controller, the
LPC11U1x brings unparalleled design flexibility and seamless integration to today’s
demanding connectivity solutions.
The peripheral complement of the LPC11U1x includes up to 32 kB of flash memory, 6 kB
of SRAM data memory, one Fast-mode Plus I2C-bus interface, one RS-485/EIA-485
USART with support for synchronous mode and smart card interface, two SSP interfaces,
four general purpose counter/timers, a 10-bit ADC, and up to 40 general purpose I/O pins.
For additional documentation related to the LPC11U1x parts, see Section 15
2.
Features and benefits
System:
ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.
ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).
Non Maskable Interrupt (NMI) input selectable from several input sources.
System tick timer.
Memory:
Up to 32 kB on-chip flash program memory.
Total of 6 kB SRAM data memory (4 kB main SRAM and 2 kB USB SRAM).
16 kB boot ROM includes
In-System Programming (ISP) and In-Application Programming (IAP) via on-chip
bootloader software.
ROM-based 32-bit integer division routines.
Debug options:
Standard JTAG test interface for BSDL.
Serial Wire Debug.
Digital peripherals:
LPC11U1x
32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash; 6 kB
SRAM; USB device; USART
Rev. 2.2 — 11 March 2014
Product data sheet
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