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參數(shù)資料
| 型號(hào)： | LMX2542LQX2121 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | PLLatinum Cellular and GPS Frequency Synthesizer System with Integrated VCO |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, QCC28 |
| 封裝： | 5 X 5 MM, 0.75 MM HEIGHT, LLP-28 |
| 文件頁數(shù)： | 4/22頁 |
| 文件大小： | 253K |
| 代理商： | LMX2542LQX2121 |
Pin Description
(Continued)
Pin No.
17
Pin Name
V
CC
I/O
—
Description
Power supply bias for the RF PLL charge pump. V
CC
may range from 2.7V to 3.3V.
Bypass capacitors should be placed as close as possible to this pin and be connected
directly to the ground plane on the printed circuit board.
Power supply bias for the RF PLL digital circuits. V
CC
may range from 2.7V to 3.3V.
Bypass capacitors should be placed as close as possible to this pin and be connected
directly to the ground plane on the printed circuit board.
Digital filtered lock detect output.
Chip Enable input. High Impedance CMOS input. When this pin is set HIGH, the RF
and IF synthesizer systems are powered up. Powerdown is then controlled through the
MICROWIRE. When this pin is set LOW, the device is asynchronously powered down
and the IF PLL charge pump output is forced to a high impedance state (TRI-STATE
).
Ground for the RF PLL digital circuits.
Reference oscillator input. The input is driven by an external AC coupled source. When
the OSC_FREQ bit is set LOW, a 19.20 MHz reference frequency should be used.
When the OSC_FREQ bit is set HIGH, a 19.68 MHz reference frequency should be
used.
Power supply bias for the reference oscillator buffer. V
CC
may range from 2.7V to 3.3V.
Bypass capacitors should be placed as close as possible to this pin and be connected
directly to the ground plane on the printed circuit board.
Ground for the reference oscillator buffer.
Ground for the IF PLL digital circuits.
Power supply bias for the IF PLL digital circuits. V
CC
may range from 2.7V to 3.3V.
Bypass capacitors should be placed as close as possible to this pin and be connected
directly to the ground plane on the printed circuit board.
No Connect. Do not connect to any node on the printed circuit board.
Power supply bias for the IF PLL buffer/ prescaler. V
CC
may range from 2.7V to 3.3V.
Bypass capacitors should be placed as close as possible to this pin and be connected
directly to the ground plane on the printed circuit board.
18
V
CC
—
19
20
LD
CE
O
I
21
22
GND
OSCin
—
I
23
V
CC
—
24
25
26
GND
GND
V
CC
—
—
—
27
28
NC
V
CC
—
—
L
www.national.com
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