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參數(shù)資料
| 型號(hào)： | LMX2353TMX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | PLLatinum⑩ Fractional N Single 2.5 GHz Frequency Synthesizer |
| 中文描述： | PHASE LOCKED LOOP, 2500 MHz, PDSO16 |
| 封裝： | PLASTIC, TSSOP-16 |
| 文件頁(yè)數(shù)： | 4/16頁(yè) |
| 文件大?。?/td> | 210K |
| 代理商： | LMX2353TMX |
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Electrical Characteristics
(V
CC
= Vp = 3.0V; 40C
<
T
A
<
85C except as specified). (Continued)
Symbol
Parameter
Conditions
Value
Typ
Unit
Min
Max
DIGITAL INTERFACE (DATA, CLK, LE, EN, F
o
LD)
I
IH
High-Level Input Current
I
IL
Low-Level Input Current
I
IH
Oscillator Input Current
I
IL
Oscillator Input Current
V
OH
High-Level Output Voltage
V
IH
= V
CC
= 5.5V, (Note 4)
V
IL
= 0, V
CC
= 5.5V, (Note 4)
V
IH
= V
CC
= 5.5V
V
IL
= 0, V
CC
= 5.5V
I
OH
= 500 μA
1.0
1.0
1.0
1.0
100
μA
μA
μA
μA
100
V
CC
0.4
V
V
OL
MICROWIRE TIMING
t
CS
t
CH
t
CWH
t
CWL
t
ES
Low-Level Output Voltage
I
OL
= 500 μA
0.4
V
Data to Clock Setup Time
Data to Clock Hold Time
Clock Pulse Width High
Clock Pulse Width Low
Clock to Load Enable Setup
Time
Load Enable Pulse Width
See Data Input Timing
See Data Input Timing
See Data Input Timing
See Data Input Timing
See Data Input Timing
50
10
50
50
ns
ns
ns
ns
50
ns
t
EW
See Data Input Timing
50
ns
Note 3:
Minimum operating frequencies are not production tested — only characterized.
Note 4:
Except f
IN
and OSC
IN
.
1.0 Functional Description
The basic phase-lock-loop (PLL) configuration consists of a high-stability crystal reference oscillator, a frequency synthesizer
such as the National Semiconductor LMX2353, a voltage controlled oscillator (VCO), and a passive loop filter. The frequency syn-
thesizer includes a phase detector, current mode charge pump, as well as programmable reference [R] and feedback [N] fre-
quency dividers. The VCO frequency is established by dividing the crystal reference signal down via the R counter to obtain a fre-
quency that sets the comparison frequency. This reference signal, fr, is then presented to the input of a phase/frequency detector
and compared with another signal, fp, the feedback signal, which was obtained by dividing the VCO frequency down by way of
the N counter and fractional circuitry. The phase/frequency detector’s current source outputs pump charge into the loop filter,
which then converts the charge into the VCO’s control voltage. The phase/frequency comparator’s function is to adjust the voltage
presented to the VCO until the feedback signal’s frequency (and phase) match that of the reference signal. When this “phase-
locked” condition exists, the RF VCO’s frequency will be N+F times that of the comparison frequency, where N is the integer di-
vide ratio and F is the fractional component. The fractional synthesis allows the phase detector frequency to be increased while
maintaining the same frequency step size for channel selection. The division value N is thereby reduced giving a lower phase
noise referred to the phase detector input, and the comparison frequency is increased allowing faster switching times.
1.1 REFERENCE OSCILLATOR INPUT
The reference oscillator frequency for the PLL is provided by an external reference TCXO through the OSC
pin. OSC
block can
operate to 50 MHz with a minimum input sensitivity of 0.5 V
pp
. The inputs have a V
CC
/2 input threshold and can be driven from
an external CMOS or TTL logic gate.
1.2 REFERENCE DIVIDER (R-COUNTER)
The R-counter is clocked through the oscillator block. The maximum frequency is 50 MHz. The R-counter is CMOS design and
15-bit in length with programmable divider ratio from 3 to 32,767.
1.3 FEEDBACK DIVIDER (N-COUNTER)
The N counter is clocked by the small signal f
input pin. The N counter is 19 bits with 15 bits integer divide and 4 bits fractional.
The integer part is configured as a 5-bit A counter and a 10-bit B counter. The LMX2353 is capable of operating from 500 MHz
to 1.2 GHz with the 16/17 prescaler offering a continuous integer divide range from 272 to 16399, and 1.2 GHz to 2.5 GHz with
the 32/33 prescaler offering a continuous integer divide range from 1056 to 32767. The fractional compensation is programmable
in either 1/15 or 1/16 modes.
1.3.1 Prescaler
The RF input to the prescaler consist of f
and f
; which are complimentary inputs to a differential pair amplifier. The compli-
mentary input is internally coupled to ground with a 10 pF capacitor. This input is typically AC coupled to ground through external
capacitors as well. A 16/17 or 32/33 prescaler ratio can be selected.
www.national.com
4
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| LMX2353TMX/NOPB | 功能描述:IC FREQ SYNTH 2.5GHZ 16-TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:PLLatinum™ 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| LMX2354 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum Fractional N RF/ Integer N IF Dual Low Power Frequency Synthesizer |
| LMX2354SLB | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum Fractional N RF/ Integer N IF Dual Low Power Frequency Synthesizer |
| LMX2354SLBX | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
| LMX2354SLBX/NOPB | 功能描述:IC FREQ SYNTH DUAL 24-LAMCSP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:PLLatinum™ 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
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