參數(shù)資料
型號: LM9823
文件頁數(shù): 9/20頁
文件大小: 245K
代理商: LM9823
Pin Descriptions
(Continued)
NewLine
New Line signal. Used to indicate the
start of active pixels on a new line, to
allow clamping of the AC coupling caps
and to allow programming of the
configuration register. When NewLine is
high and SampCLK is low, the OS
inputs will be connected to either V
REF
,
or V
REF
. On the first rising edge of
MCLK after NewLine goes low, the
internal mux and the offset and gain
settings will be set to the appropriate
values for the first color of the next line
set in the color mode setting in the
Sampler and Color Mode Register.
When NewLine is low, D transmit the
pixel conversion data from ADC. When
NewLine is high, D enter TRI-STATE
and D2, D1 and D0 act as a serial
interface for programming the
configuration registers.
Digital Power
This is the positive supply pin for the
digital supply. It should be connected to
a voltage source of +5V and bypassed
to DGND with a 0.1 μF monolithic
capacitor.
This is ground return for the digital
supply.
Digital I/O
Data Input/Output pins. When NewLine
is low, the 10-bit or 12-bit conversion
results of the ADC are multiplexed to
D5-D0. When NewLine is high, the
output drivers enter TRI-STATE and D2,
D1 and D0 act as a serial interface for
writing to the configuration registers.
MCLK0, MCLK1, MCLK2, MCLK3
V
D
DGND
D5-D0
LM9810
Output
Mode
(NewLine
Low)
D5
D4
D3
D2
D1
D0
LM9820
Output
Mode
(NewLine
Low)
D5
D4
D3
D2
b9,
b8,
b7,
b6,
b5,
b4,
MCLK0, MCLK1, MCLK2, MCLK3
b9,
b8,
b7,
b6,
b5,
b4,
b3,
b2,
b1,
b0,
0,
0,
b3
b2
b1
b0
0
0
b11,
b10,
b9,
b8,
b11,
b10,
b9,
b8,
b5,
b4,
b3,
b2,
b5
b4
b3
b2
L
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