參數(shù)資料
型號： LM9823
文件頁數(shù)： 10/20頁
文件大?。?/td> 245K
代理商： LM9823
Pin Descriptions
(Continued)
D1
D0
Input Mode
(NewLine
High)
D5-D3
D2 (SCLK)
D1 (Latch)
b7,
b6,
b7,
b6,
b1,
b0,
b1
b0
Don’t Care
Serial Data Clock.
Latch and Shift Enable Signal. When
D1(Latch) is low, data is shifted into
D0(SDI). When D1(Latch) goes high,
the last nine bits shifted into D0(SDI)
will be used to program the addressed
configuration register. To avoid
erroneous writes to the configuration
registers, D1(Latch) should be pulled
low when NewLine is high.
Serial Input Data. Data is valid on
D2(SCLK) rising edge. Three address
bits followed by six data bits (MSB first)
should be shifted into D0 before
D1(Latch) goes high.
D0 (SDI)
Timing Diagrams
DS100943-73
FIGURE 1. Pixel Conversion Timing and Latency
DS100943-74
FIGURE 2. SampCLK and Output Data Timing (NewLine Low)
L
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LM9830VJD 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 RoHS:否 制造商:Texas Instruments 輸入信號類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel
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