參數(shù)資料
型號： LM9811CCV
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 模擬信號調(diào)理
英文描述： 10-Bit Greyscale/30-Bit Color Linear CCD Sensor Processor
中文描述： SPECIALTY ANALOG CIRCUIT, PQCC52
封裝： PLASTIC, LCC-52
文件頁數(shù)： 5/36頁
文件大小： 605K
代理商： LM9811CCV
AC Electrical Characteristics, MCLK Independent
The following specifications apply for AGND = DGND = DGND
= 0V, V
= V
= V
= +5.0V
, REF IN = +1.225V
,
f
= 20MHz, t
= 1/f
, t
r
= t
f
= 5ns, R
s
= 25
, C
L
(databus loading) = 50 pF/pin.
Boldface limits apply for T
A
= T
J
= T
MIN
to T
MAX
; all other limits T
A
= T
J
= 25C.
Symbol
Parameter
Conditions
Typical
(Note 9)
Limits
(Note 10)
20
1
40
60
10
20
0
15
Units
(Limits)
MHz (min)
MHz (max)
% (min)
% (max)
ns (min)
ns (min)
ns (min)
ns (max)
f
MCLK
Maximum MCLK Frequency (Note 16)
Minimum MCLK Frequency
MCLK Duty Cycle
30
70
5
14
12
5
t
A
t
CDSETUP
t
CDHOLD
t
D1H
, t
D0H
SYNC Setup of MCLK
Correction Data Valid to CLK Setup
Correction Data Valid to CLK Hold
RD High to DD0–DD9 TRI-STATE
Access Time Delay from RD Low to
DD0–DD9 Data Valid
Maximum SCLK Frequency
t
DACC
15
30
ns (max)
f
SCLK
8
MHz (min)
% (min)
% (max)
SCLK Duty Cycle
40
60
t
SDI
SDI Set-Up Time from SCLK
Rising Edge
SDI Hold Time from SCLK
Rising Edge
Delay from SCLK Falling Edge to
SDO Data Valid
SDO Hold Time from SCLK
Falling Edge
3
10
ns (min)
t
HDI
2
15
ns (min)
t
DDO
25
55
ns (max)
t
HDO
R
L
= 3k, C
L
= 25pF
30
55
5
ns (max)
ns (min)
t
DELAY
DELAY from SCLK Falling Edge to CS
Rising or Falling Edge
Set-Up Time of CS Rising or Falling
Edge to SCLK Rising Edge
Delay from CS Rising Edge to SDO
TRI-STATE
SDO Rise Time, TRI-STATE to High
SDO Rise Time, Low to High
SDO Fall Time, TRI-STATE to Low
SDO Fall Time, High to Low
5
10
ns (min)
t
SETUP
0
10
ns (min)
t
S1H
, t
S0H
R
L
= 3k, C
L
= 50pF
25
50
ns (max)
t
RDO
R
L
= 3k, C
L
= 50pF
20
20
20
20
ns
ns
ns
ns
t
FDO
R
L
= 3k, C
L
= 50pF
AC Electrical Characteristics, MCLK Dependent
The following specifications apply for AGND = DGND = DGND
= 0V, V
= V
= V
= +5.0V
, REF IN = +1.225V
DC
,
f
= 20MHz, t
= 1/f
, t
= t
f
= 5ns, R
= 25
, C
(databus loading) = 50 pF/pin. Refer to Table 2
. Configuration
Register Parameters
for limits labelled
C.R. Boldface limits apply for T
A
= T
J
= T
MIN
to T
MAX
; all other limits T
A
= T
J
=
25C.
Symbol
Parameter
Conditions
Typical
(Note 9)
50ns
400ns
800ns
Limits
(Note 10)
1
8
16
C.R.
C.R.
C.R.
Units
(Limits)
t
MCLK
t
MCLK
t
MCLK
μs
ns
ns
t
START
MCLK to first
φ
1 High
t
φ
φ
1,
φ
2 Clock Period
Standard CCD Mode
Even/Odd CCD Mode
t
TRWIDTH
t
GUARD
t
RSWIDTH
Transfer Pulse (TR) Width
φ
1 to TR, TR to
φ
1 Guardband
Reset Pulse (RS) Width
Falling Edge of
φ
1 to RS
Either Edge of
φ
1 to RS
t
RS
Standard CCD Mode
Even/Odd CCD Mode
C.R.
ns
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LM9811CCVF 制造商:NSC 制造商全稱:National Semiconductor 功能描述:10-Bit Greyscale/30-Bit Color Linear CCD Sensor Processor
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