參數(shù)資料
型號(hào): LM81CIMTX-3
英文描述: Single-Ended Data Acquisition System
中文描述: 單端數(shù)據(jù)采集系統(tǒng)
文件頁(yè)數(shù): 13/33頁(yè)
文件大小: 414K
代理商: LM81CIMTX-3
Functional Description
(Continued)
2.2 Serial Bus Interface
The Serial Bus control lines consist of the SMBData (serial
data), SMBCLK (serial clock) and A0-A1 (address) pins. The
LM81 can operate only as a slave. The SMBCLK line only
controls the serial interface, all other clock functions within
LM81 such as the ADC and fan counters are done with a
separate asynchronous internal clock.
When using the Serial Bus Interface a write will always
consist of the LM81 Serial Bus Interface Address byte,
followed by the Internal Address Register byte, then the data
byte. There are two cases for a read:
1.
If the InternalAddress Register is known to already be at
the desired Address, simply read the LM81 with the
Serial Bus Interface Address byte, followed by the data
byte read from the LM81.
2.
If the Internal Address Register value is unknown, or if it
is not the desired value, write to the LM81 with the Serial
Bus Interface Address byte, followed by the Internal
Address
Register
byte.
Communication with a Read consisting of the Serial Bus
Interface Address byte, followed by the data byte read
from the LM81.
The default Serial Bus address of the LM81 is set to 010
11(A1)(A0).All bits, except forA0 andA1, can be changed by
writing to the Serial Bus address register. A0 and A1 will
always reflect the state of the A0 and A1 input pins.
All of these communications are depicted in the Serial Bus
Interface Timing Diagrams as shown in Figure 5
Serial Bus Timeout can be initiated by holding the SMBCLK
and/or SMBData lines low for greater than t
(35 ms
max). Serial Bus Timeout resets the serial bus interface
circuitry to the idle state and readies the LM81 for a new
serial bus communication.
Then
restart
the
Serial
DS100072-8
(a) Serial Bus Write to the Internal Address Register followed by the Data Byte
DS100072-9
(b) Serial Bus Write to the Internal Address Register Only
DS100072-10
(c) Serial Bus Read from a Register with the Internal Address Register Preset to Desired Location
FIGURE 5. Serial Bus Timing
L
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13
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