參數(shù)資料
型號: LM3224MMX-ADJ
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 穩(wěn)壓器
英文描述: 615kHz/1.25MHz Step-up PWM DC/DC Converter
中文描述: 2.8 A SWITCHING REGULATOR, 1500 kHz SWITCHING FREQ-MAX, PDSO8
封裝: PLASTIC, MSOP-8
文件頁數(shù): 13/18頁
文件大?。?/td> 920K
代理商: LM3224MMX-ADJ
Application Information
TRIPLE OUTPUT TFT BIAS
The circuit in
Figure 3
shows how the LM3224 can be
configured to provide outputs of 8V, 8V, and 23V, conve-
nient for biasing TFT displays. The 8V output is regulated,
while the 8V and 23V outputs are unregulated.
The 8V output is generated by a typical boost topology. The
basic operation of the boost converter is described in the
OPERATION section. The output voltage is set with R
FB1
and R
FB2
by:
The compensation network of R
C
and C
C
are chosen to
optimally stabilize the converter. The inductor also affects
the stability. When operating at 615 kHz, a 10uH inductor is
recommended to insure the converter is stable at duty cycles
greater than 50%. Refer to the COMPENSATION section for
more information.
The -8V output is derived from a diode inverter. During the
second cycle, when the transistor is open, D2 conducts and
C1 charges to 8V minus a diode drop (
)
0.4V if using a
Schottky). When the transistor opens in the first cycle, D3
conducts and C1’s polarity is reversed with respect to the
output at C2, producing -8V.
The 23V output is realized with a series of capacitor charge
pumps. It consists of four stages: the first stage includes C4,
D4, and the LM3224 switch; the second stage uses C5, D5,
and D1; the third stage includes C6, D6, and the LM3224
switch; the final stage is C7 and D7. In the first stage, C4
charges to 8V when the LM3224 switch is closed, which
causes D5 to conduct when the switch is open. In the second
stage, the voltage across C5 is VC4 + VD1 - VD5 = VC4
)
8V when the switch is open. However, because C5 is refer-
enced to the 8V output, the voltage at C5 is 16V when
referenced to ground. In the third stage, the 16V at C5
appears across C6 when the switch is closed. When the
switch opens, C6 is referenced to the 8V output minus a
diode drop, which raises the voltage at C6 with respect to
ground to about 24V. Hence, in the fourth stage, C7 is
charged to 24V when the switch is open. From the first stage
20097608
FIGURE 3. Triple Output TFT Bias (615 kHz operation)
L
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