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參數(shù)資料
| 型號(hào)： | LM2240 |
| 廠商： | National Semiconductor Corporation |
| 元件分類(lèi)： | 通用總線功能 |
| 英文描述： | Programmable Timer/Counter |
| 中文描述： | 可編程定時(shí)器/計(jì)數(shù)器 |
| 文件頁(yè)數(shù)： | 8/10頁(yè) |
| 文件大?。?/td> | 201K |
| 代理商： | LM2240 |
Astable Operation
(Continued)
V
CC
e
Pin 16
GND
e
Pin 9
TL/H/10837–10
FIGURE 7. Cascaded Operation for Long Delays
Binary Pattern Generation
In astable operation, as shown in Figures 8 and 9, the out-
put of the LM2240 appears as a complex pulse pattern if
more than one of its switches is closed. The waveform of
the output pulse train can be determined directly from the
timing diagram ofFigure 2, which shows the phase relations
between the counter outputs.Figures 10 and11 show some
of the complex pulse patterns that can be generated. The
pulse pattern repeats itself at a rate equal to the period of
the highest counter bit connected to the common output
bus. The minimum pulse width contained in the pulse train is
determined by the lowest counter bit connected to the out-
put.
V
CC
e
Pin 16
GND
e
Pin 9
TL/H/10837–11
FIGURE 8. Astable Operation
with Trigger and Reset Inputs
V
CC
e
Pin 16
GND
e
Pin 9
TL/H/10837–12
FIGURE 9. Free Running Astable Operation
TL/H/10837–13
FIGURE 10. Binary Pulse Patterns Obtained
by Shorting Various Counter Outputs
8
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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