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參數(shù)資料
| 型號： | LIS3L02DS |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO24 |
| 封裝： | PLASTIC, SO-24 |
| 文件頁數(shù)： | 17/18頁 |
| 文件大?。?/td> | 511K |
| 代理商： | LIS3L02DS |
LIS3L02DS
8/18
knowledge pulse. The receiver must then pull the data line LOW so that it remains stable low during the
HIGH period of the acknowledge clock pulse. A receiver which has been addressed is obliged to generate
an acknowledge after each byte of data has been received.
The I2C embedded inside the Gengine ASIC behaves like a slave device and the following protocol must
be adhered to. After the start condition (ST) a salve address is sent, once a slave acknowledge has been
returned, a 8-bit sub-address will be transmitted: the 7 LSB represent the actual register address while the
MSB enables address autoincrement. If the MSB of the SUB field is 1, the SUB (register address) will be
automatically incremented to allow multiple data read/write.
If the LSB of the slave address was ‘1’ (read), a repeated START condition will have to be issued after the
two sub-address bytes; if the LSB is ‘0’ (write) the Master will transmit to the slave with direction un-
changed.
Transfer when Master is writing one byte to slave
Transfer when Master is writing multiple bytes to slave:
Transfer when Master is receiving (reading) one byte of data from slave:
Transfer when Master is receiving (reading) multiple bytes of data from slave
Data are transmitted in byte format. Each data transfer contains 8 bits. The number of bytes transferred
per transfer is unlimited. Data is transferred with the Most Significant Bit (MSB) first. If a receiver can’t re-
ceive another complete byte of data until it has performed some other function, it can hold the clock line,
SCL LOW to force the transmitter into a wait state. Data transfer only continues when the receiver is ready
for another byte and releases the data line. If a slave receiver doesn’t acknowledge the slave address (i.e.
it is not able to receive because it is performing some real time function) the data line must be left HIGH
by the slave. The Master can then abort the transfer. A LOW to HIGH transition on the SDA line while the
SCL line is HIGH is defined as a STOP condition. Each data transfer must be terminated by the generation
of a STOP condition.
In order to read multiple bytes, it is necessary to assert the most significant bit of the sub-address field. In
other words, SUB(7) must be equal to 1 while SUB(6-0) represents the address of first register to read.
Master
ST
SAD + W
SUB
DATA
SP
Slave
SAK
Master
ST
SAD + W
SUB
DATA
SP
Slave
SAK
Master
ST
SAD + W
SUB
SR
SAD + R
NMAK
SP
Slave
SAK
DATA
Master
ST
SAD + W
SUB
SR
SAD + R
MAK
Slave
SAK
DATA
Master
SR
MAK
NMAK
SP
Slave
DATA
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| LIS3L06AL | 功能描述:加速計 - 板上安裝 3-axis +/-2g/+/-6g MEMS Intertial Sensr RoHS:否 制造商:Murata 傳感軸:Double 加速:12 g 靈敏度: 封裝 / 箱體: 輸出類型:Analog 數(shù)字輸出 - 位數(shù):11 bit 電源電壓-最大:5.25 V 電源電壓-最小:4.75 V 電源電流:4 mA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C |
| LIS3L06AL_06 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:MEMS INERTIAL SENSOR-3-axis - +/-2g/6g ultracompact linear accelerometer |
| LIS3L06ALTR | 功能描述:加速計 - 板上安裝 MEMS INERTIAL snsr 3 axis RoHS:否 制造商:Murata 傳感軸:Double 加速:12 g 靈敏度: 封裝 / 箱體: 輸出類型:Analog 數(shù)字輸出 - 位數(shù):11 bit 電源電壓-最大:5.25 V 電源電壓-最小:4.75 V 電源電流:4 mA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C |
| LIS3LV02DL | 功能描述:加速計 - 板上安裝 MEMS INERTIAL SENSOR RoHS:否 制造商:Murata 傳感軸:Double 加速:12 g 靈敏度: 封裝 / 箱體: 輸出類型:Analog 數(shù)字輸出 - 位數(shù):11 bit 電源電壓-最大:5.25 V 電源電壓-最小:4.75 V 電源電流:4 mA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C |
| LIS3LV02DL_08 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:MEMS inertial sensor 3-axis - 【2g/【6g digital output low voltage linear accelerometer |
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