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參數(shù)資料
| 型號： | LH540203 |
| 廠商： | Sharp Corporation |
| 英文描述： | CMOS 2048 x 9 Asynchronous FIFO |
| 中文描述： | 2048 × 9的CMOS異步FIFO |
| 文件頁數(shù)： | 10/17頁 |
| 文件大?。?/td> | 153K |
| 代理商： | LH540203 |
AC ELECTRICAL CHARACTERISTICS
1
(Over Operating Range)
SYMBOL
PARAMETER
t
A
= 15 ns
MIN
t
A
= 20 ns
MIN
t
A
= 25 ns
MIN
t
A
= 35 ns
MIN
t
A
= 50 ns
MIN
UNIT
MAX
MAX
MAX
MAX
MAX
READ CYCLE TIMING
25
–
–
15
10
–
15
–
5
–
10
–
5
–
–
15
t
RC
t
A
t
RR
t
RPW
t
RLZ
t
WLZ
t
DV
t
RHZ
Read Cycle Time
Access Time
Read Recovery Time
Read Pulse Width
2
Data Bus Active from Read LOW
3
Data Bus Active from Write HIGH
3,4
Data Valid from Read Pulse HIGH
Data Bus High-Z from Read HIGH
3
30
–
10
20
5
10
5
–
–
20
–
–
–
–
–
15
35
–
10
25
5
10
5
–
–
25
–
–
–
–
–
15
45
–
10
35
5
10
5
–
–
65
–
15
50
5
10
5
–
–
ns
ns
ns
ns
ns
ns
ns
ns
35
–
–
–
–
–
15
50
–
–
–
–
–
20
WRITE CYCLE TIMING
25
–
15
–
10
–
12
–
0
–
t
WC
t
WPW
t
WR
t
DS
t
DH
Write Cycle Time
Write Pulse Width
2
Write Recovery Time
Data Setup Time
Data Hold Time
30
20
10
12
0
–
–
–
–
–
35
25
10
12
0
–
–
–
–
–
45
35
10
15
0
–
–
–
–
–
65
50
15
20
0
–
–
–
–
–
ns
ns
ns
ns
ns
RESET TIMING
25
–
15
–
10
–
15
–
15
–
RETRANSMIT TIMING
5
25
–
15
–
10
–
t
RSC
t
RS
t
RSR
t
RRSS
t
WRSS
Reset Cycle Time
Reset Pulse Width
2
Reset Recovery Time
Read HIGH to RS HIGH
Write HIGH to RS HIGH
30
20
10
20
20
–
–
–
–
–
35
25
10
25
25
–
–
–
–
–
45
35
10
35
35
–
–
–
–
–
65
50
15
50
50
–
–
–
–
–
ns
ns
ns
ns
ns
t
RTC
t
RT
t
RTR
Retransmit Cycle Time
Retransmit Pulse Width
2
Retransmit Recovery Time
30
20
10
–
–
–
35
25
10
–
–
–
45
35
10
–
–
–
65
50
15
–
–
–
ns
ns
ns
FLAG TIMING
25
t
EFL
Reset LOW to Empty Flag LOW
Reset LOW to Half-Full and Full
Flags HIGH
Read LOW to Empty Flag LOW
Read HIGH to Full Flag HIGH
Write HIGH to Empty Flag HIGH
Write LOW to Full Flag LOW
Write LOW to Half-Full Flag LOW
Read HIGH to Half-Full Flag HIGH
–
–
30
–
35
–
45
–
65
ns
t
HFH,FFH
–
25
–
30
–
35
–
45
–
65
ns
t
REF
t
RFF
t
WEF
t
WFF
t
WHF
t
RHF
–
–
–
–
–
–
15
15
15
15
15
15
–
–
–
–
–
–
20
20
20
20
20
20
–
–
–
–
–
–
25
25
25
25
25
25
–
–
–
–
–
–
35
35
35
35
35
35
–
–
–
–
–
–
45
45
45
45
45
45
ns
ns
ns
ns
ns
ns
EXPANSION TIMING
–
18
–
18
15
–
10
–
7
–
t
XOL
t
XOH
t
XI
t
XIR
t
XIS
Expansion Out LOW
Expansion Out HIGH
Expansion In Pulse Width
Expansion In Recovery Time
Expansion in Setup Time
–
–
20
10
10
20
20
–
–
–
–
–
25
10
10
25
25
–
–
–
–
–
35
10
15
35
35
–
–
–
–
–
50
10
15
50
50
–
–
–
ns
ns
ns
ns
ns
NOTES:
1.
All timing measurements are performed at ‘AC Test Condition’ levels.
2.
Pulse widths less than minimum value are not allowed.
LH540203
CMOS 2048
×
9 Asynchronous FIFO
10
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LH540204 | CMOS 4096 x 9 Asynchronous FIFO |
| LH540205 | CMOS 8192 x 9 Asynchronous FIFO |
| LH540215 | 512 x 18 / 1024 x 18 Synchronous FIFO |
| LH540235 | 2048 x 18 / 4096 x 18 Synchronous FIFOs |
| LH5420 | 256 x 36 x 2 Bidirectional FIFO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LH540203-15 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Asynchronous FIFO |
| LH540203-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Asynchronous FIFO |
| LH540203-25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Asynchronous FIFO |
| LH540203-35 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Asynchronous FIFO |
| LH540203-50 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Asynchronous FIFO |
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