參數(shù)資料
型號： LH28F640SP
廠商： Sharp Corporation
英文描述： 64Mbit (4Mbitx16/8Mbitx8) Page Flash Memory
中文描述： 64兆比特（4Mbitx16/8Mbitx8）頁閃存
文件頁數(shù)： 15/45頁
文件大小： 1041K
代理商： LH28F640SP
LHF64P01 13
Rev. 0.06
Table 7. Status Register Definition
R
15
R
14
R
13
R
12
R
11
R
10
R
9
R
8
R
0
WSMS
7
SR.15 - SR.8 = RESERVED FOR FUTURE
ENHANCEMENTS (R)
BESS
6
BECBLS
5
PBPOPSBLS
4
VPENS
3
PBPSS
2
DPS
1
SR.7 = WRITE STATE MACHINE STATUS (WSMS)
1 = Ready
0 = Busy
SR.6 = BLOCK ERASE SUSPEND STATUS (BESS)
1 = Block Erase Suspended
0 = Block Erase in Progress/Completed
SR.5 = BLOCK ERASE AND CLEAR BLOCK LOCK
BITS STATUS (BECBLS)
1 = Error in Block Erase or Clear Block Lock Bits
0 = Successful Block Erase or Clear Block Lock Bits
SR.4 = (PAGE BUFFER) PROGRAM, OTP PROGRAM
AND SET BLOCK LOCK BIT STATUS (PBPOPSBLS)
1 = Error in (Page Buffer) Program, OTP Program or Set
Block Lock Bit
0 = Successful (Page Buffer) Program, OTP Program or
Set Block Lock Bit
SR.3 = V
PEN
STATUS (VPENS)
1 = V
PEN
LOW Detect, Operation Abort
0 = V
PEN
OK
SR.2 = (PAGE BUFFER) PROGRAM SUSPEND STATUS
(PBPSS)
1 = (Page Buffer) Program Suspended
0 = (Page Buffer) Program in Progress/Completed
SR.1 = DEVICE PROTECT STATUS (DPS)
1 = Erase or Program Attempted on a
Locked Block, Operation Abort
0 = Unlocked
SR.0 = RESERVED FOR FUTURE ENHANCEMENTS (R)
NOTES:
Check SR.7 or STS to determine block erase, (page buffer)
program, block lock configuration or OTP program
completion. SR.6 - SR.1 are invalid while SR.7="0".
If both SR.5 and SR.4 are "1"s after a block erase, page
buffer program, block lock configuration, STS configuration
attempt, an improper command sequence was entered.
SR.3 does not provide a continuous indication of V
PEN
level.
The WSM interrogates and indicates the V
PEN
level only
after Block Erase, (Page Buffer) Program, Set Block Lock
Bit, Clear Block Lock Bits or OTP Program command
sequences. SR.3 is not guaranteed to report accurate feedback
when V
PEN
≠
V
PENH
or V
PENLK
.
SR.1 does not provide a continuous indication of block lock
bit. The WSM interrogates the block lock bit only after Block
Erase, (Page Buffer) Program or OTP Program command
sequences. It informs the system, depending on the attempted
operation, if the block lock bit is set. Reading the block lock
configuration codes after writing the Read Identifier Codes/
OTP command indicates block lock bit status.
SR.15 - SR.8 and SR.0 are reserved for future use and should
be masked out when polling the status register.
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