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參數資料
| 型號： | LH28F320BFHE-PBTL60 |
| 廠商： | Sharp Corporation |
| 英文描述： | 32M (x16) Flash Memory |
| 中文描述： | 32M的（x16）的快閃記憶體 |
| 文件頁數： | 16/37頁 |
| 文件大小： | 693K |
| 代理商： | LH28F320BFHE-PBTL60 |
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LHF32FB4 14
Table 10. Status Register Definition
R
15
R
14
R
13
R
12
R
11
R
10
R
9
R
8
R
0
WSMS
7
SR.15 - SR.8 = RESERVED FOR FUTURE
ENHANCEMENTS (R)
BESS
6
BEFCES
5
PBPOPS
4
WPACCS
3
PBPSS
2
DPS
1
SR.7 = WRITE STATE MACHINE STATUS (WSMS)
1 = Ready
0 = Busy
SR.6 = BLOCK ERASE SUSPEND STATUS (BESS)
1 = Block Erase Suspended
0 = Block Erase in Progress/Completed
SR.5 = BLOCK ERASE AND FULL CHIP ERASE
STATUS (BEFCES)
1 = Error in Block Erase or Full Chip Erase
0 = Successful Block Erase or Full Chip Erase
SR.4 = (PAGE BUFFER) PROGRAM AND
OTP PROGRAM STATUS (PBPOPS)
1 = Error in (Page Buffer) Program or OTP Program
0 = Successful (Page Buffer) Program or OTP Program
SR.3 = WP#/ACC STATUS (WPACCS)
1 = V
CC
+0.4V < WP#/ACC < 11.7V Detect,
Operation Abort
0 = WP#/ACC OK
SR.2 = (PAGE BUFFER) PROGRAM SUSPEND
STATUS (PBPSS)
1 = (Page Buffer) Program Suspended
0 = (Page Buffer) Program in Progress/Completed
SR.1 = DEVICE PROTECT STATUS (DPS)
1 = Erase or Program Attempted on a
Locked Block, Operation Abort
0 = Unlocked
SR.0 = RESERVED FOR FUTURE ENHANCEMENTS (R)
NOTES:
Status Register indicates the status of the partition, not WSM
(Write State Machine). Even if the SR.7 is "1", the WSM may
be occupied by the other partition when the device is set to 2,
3 or 4 partitions configuration.
Check SR.7 or RY/BY# to determine block erase, full chip
erase, (page buffer) program or OTP program completion.
SR.6 - SR.1 are invalid while SR.7="0".
If both SR.5 and SR.4 are "1"s after a block erase, full chip
erase, (page buffer) program, set/clear block lock bit, set
block lock-down bit, set partition configuration register
attempt, an improper command sequence was entered.
SR.3 does not provide a continuous indication of WP#/ACC
level. The WSM interrogates and indicates the WP#/ACC
level only after Block Erase, Full Chip Erase, (Page Buffer)
Program or OTP Program command sequences. SR.3 is not
guaranteed to report accurate feedback when WP#/
ACC
≠
V
ACCH
.
SR.1 does not provide a continuous indication of block lock
bit. The WSM interrogates the block lock bit only after Block
Erase, Full Chip Erase, (Page Buffer) Program or OTP
Program command sequences. It informs the system,
depending on the attempted operation, if the block lock bit is
set. Reading the block lock configuration codes after writing
the Read Identifier Codes/OTP command indicates block
lock bit status.
SR.15 - SR.8 and SR.0 are reserved for future use and should
be masked out when polling the status register.
Rev. 2.44
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LH28F320BFHE-PBTL70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Flash ROM |
| LH28F320BFHE-PBTLF1 | 制造商:Sharp Microelectronics Corporation 功能描述:FLASH PARALLEL 3.3V 32MBIT 2MX16 80NS 48TSOP - Trays |
| LH28F320BFHE-PBTLZ2 | 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:32M (x16) Flash Memory |
| LH28F320BFHE-PBTLZA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Flash ROM |
| LH28F320BFHE-PTTL60 | 制造商:Sharp Microelectronics 功能描述:NOR Flash Parallel 3V/3.3V 32Mbit 2M x 16bit 60ns 48-Pin TSOP 制造商:Sharp Microelectronics Corporation 功能描述:FLASH PARALLEL 3V/3.3V 32MBIT 2MX16 60NS 48TSOP - Trays |
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