參數(shù)資料
型號： LH28F004SU-LC
廠商： Sharp Corporation
英文描述： 4M (512K 】 8) Flash Memory
中文描述： 4分（為512k】8）閃存
文件頁數(shù)： 7/31頁
文件大?。?/td> 249K
代理商： LH28F004SU-LC
4M (512K × 8) Flash Memory
LH28F004SU-LC
7
COMMAND
FIRST BUS CYCLE
SECOND BUS CYCLE
NOTE
OPER.
ADDRESS
DATA
OPER.
ADDRESS
DATA
Read Array
Write
X
FFH
Read
AA
AD
Intelligent Identifier
Write
X
90H
Read
IA
ID
1
Read Compatible Status Register
Write
X
70H
Read
X
CSRD
2
Clear Status Register
Write
X
50H
3
Word Write
Write
X
40H
Write
WA
WD
Alternate Word Write
Write
X
10H
Write
WA
WD
Block Erase/Confirm
Write
X
Write
BA
D0H
4
Erase Suspend/Resume
Write
X
B0H
Write
X
D0H
4
LH28F008SA-Compatible Mode Command Bus Definitions
ADDRESS
AA = Array Address
BA = Block Address
IA = Identifier Address
WA = Write Address
X = Don’t Care
DATA
AD = Array Data
CSRD = CSR Data
ID = Identifier Data
WD = Write Data
NOTES:
1. Following the intelligent identifier command, two Read operations access the manufacturer and device signature codes.
2. The CSR is automatically available after device enters Data Write, Erase or Suspend operations.
3. Clears CSR.3, CSR.4, and CSR.5. See Status register definitions.
4. While device performs Block Erase, if you issue Erase Suspend command (B0H), be sure to confirm ESS (Erase-Suspend-Status) is
set to 1 on compatible status register. In the case, ESS bit was not set to 1, also completed the Erase (ESS = 0, WSMS = 1), be sure
to issue Resume command (D0H) after completed next Erase command. Beside, when the Erase Suspend command is issued, while
the device is not in Erase, be sure to issue Resume command (D0H) after the next erase complete.
LH28F004SU-LC Performance Enhancement Command Bus Definitions
ADDRESS
BA = Block Address
WA = Write Address
X = Don’t Care
DATA
AD = Array Data
WD (L, H) = Write Data (Low, High)
WD (H, L) = Write Data (High, Low)
NOTES:
1. After initial device power-up, or return from deep power-down mode, the block lock status bit default to the locked state independent of
the data in the corresponding lock bits. In order to upload the lock bit status, it requires to write Protect Set/Confirm command.
2. To reflect the actual lock-bit status, the Protect Set/Confirm command must be written after Lock Block/Confirm command.
3. When Protect Reset/Confirm command is written, all blocks can be written and erased regardless of the state of the lock-bits.
4. The Lock Block/Confirm command must be written after Protect Reset/Confirm command was written.
5. A
10
is automatically complemented to load second byte of data A
10
value determines which WD is supplied first: A
10
= 0 looks at the
WDL, A
10
= 1 looks at the WDH.
6. Second bus cycle address of Protect Set/Confirm and Protect Reset/Confirm command is 0FFH. Specifically A
9
- A
8
= 0, A
7
- A
0
= 1,
others are don’t care.
COMMAND
MODE
FIRST BUS CYCLE
SECOND BUS CYCLE
THIRD BUS CYCLE
NOTE
OPER. ADD.
DATA OPER.
ADD.
DATA
OPER.
ADD.
DATA
Protect Set/Confirm
Write
X
57H
Write
0FFH
D0H
1, 2
Protect Reset/Confirm
Write
X
47H
Write
0FFH
D0H
3
Lock Block/Confirm
Erase All Unlocked
Blocks
Two-Byte Write
Write
X
77H
Write
BA
D0H
1, 2, 4
Write
X
A7H
Write
X
D0H
1, 2
x8
Write
X
FBH
Write
A
10
WD (L, H)
Write
WA
WD (H, L) 1, 2, 5
相關(guān)PDF資料
PDF描述
LH28F004SU-NC 4M (512K 】 8) Flash Memory
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LH28F004SU-NC 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:4M (512K 】 8) Flash Memory
LH28F004SUT-LC12 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM
LH28F004SUT-LC15 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM
LH28F004SUT-NC80 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:4M (512K 】 8) Flash Memory
LH28F004SUT-Z1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM
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