參數(shù)資料
型號(hào)： LFX1200B-4F900I
廠商： Lattice Semiconductor Corporation
英文描述： The ispXPGA architecture
中文描述： 在ispXPGA架構(gòu)
文件頁(yè)數(shù)： 21/89頁(yè)
文件大?。?/td> 941K
代理商： LFX1200B-4F900I
Lattice Semiconductor
ispXPGA Family Data Sheet
21
Absolute Maximum Ratings
1, 2, 3
1.8V
2.5V/3.3V
Supply Voltage (V
CC
) . . . . . . . . . . . . . . . . . . . . . . -0.5 to 2.5V . . . . . . . . . .-0.5 to 5.5V
PLL Supply Voltage (V
CCP
) . . . . . . . . . . . . . . . . . -0.5 to 2.5V . . . . . . . . . .-0.5 to 5.5V
Output Supply Voltage (V
CCO
) . . . . . . . . . . . . . . . -0.5 to 4.5V . . . . . . . . . .-0.5 to 4.5V
IEEE 1149.1 TAP Supply Voltage (V
CCJ
) . . . . . . . -0.5 to 4.5V . . . . . . . . . .-0.5 to 4.5V
Input Voltage Applied
4
. . . . . . . . . . . . . . . . . . . . . -0.5 to 4.5V . . . . . . . . . .-0.5 to 4.5V
Storage Temperature . . . . . . . . . . . . . . . . . . . . . .-65 to 150
°
C. . . . . . . . . -65 to 150
°
C
Junction Temperature (T
J
) with Power Applied . .-55 to 150
°
C. . . . . . . . . -55 to 150
°
C
1. Stress above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. Functional
operation of the device at these or any other conditions above those indicated in the operational sections of this speci
fi
cation
is not implied (while programming, following the programming speci
fi
cations).
2. Compliance with the Lattice Thermal Management technical note is required.
3. All voltages referenced to GND.
4. Overshoot and undershoot of -2V to (V
IH
(MAX) + 2) volts is permitted for a duration of <20ns
Recommended Operating Conditions
E
2
CMOS Erase Reprogram Speci
fi
cations
Hot Socketing Characteristics
1, 2, 3, 4
Symbol
Parameter
Min
Max
Units
V
CC
Supply Voltage for 1.8V device
1.65
1.95
V
Supply Voltage for 2.5V device
2.3
2.7
V
Supply Voltage for 3.3V device
3.0
3.6
V
V
CCP
Supply Voltage for PLL block for 1.8V device
1.65
1.95
V
Supply Voltage for PLL block for 2.5V device
2.3
2.7
V
Supply Voltage for PLL block for 3.3V device
3.0
3.6
V
V
CCJ
Supply Voltage for IEEE 1149.1 Test Access Port for LVCMOS 1.8V
1.65
1.95
V
Supply Voltage for IEEE 1149.1 Test Access Port for LVCMOS 2.5V
2.3
2.7
V
Supply Voltage for IEEE 1149.1 Test Access Port for LVCMOS 3.3V
3.0
3.6
V
T
J
(COM)
T
J
(IND)
Junction Temperature Commercial Operation
0
85
C
Junction Temperature Industrial Operation
-40
105
C
Parameter
Min
Max
Units
Erase/Reprogram Cycle
1
1,000
—
Cycles
1. Valid over commercial temperature range.
Symbol
Parameter
Condition
Min
Typ
Max
Units
I
DK
1. Insensitive to sequence of V
CC
and V
CCO
. However, assumes monotonic rise / fall rates for V
CC
and V
CCO
.
2. LVTTL, LVCMOS only
3. 0 < V
CC
≤
V
CC
(MAX), 0 < V
CCO
≤
V
CCO
(MAX)
4. I
DK
is additive to I
PU
, I
PD
or I
BH
. Device defaults to pull-up until fuse circuitry is active.
Input or I/O Leakage Current
0
≤
V
IN
≤
3.0V
—
+/-50
+/-800
μ
A
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