- 您現在的位置：買賣IC網 > PDF目錄377639 > LFX1200B-3F900C (Lattice Semiconductor Corporation) The ispXPGA architecture PDF資料下載
參數資料
| 型號： | LFX1200B-3F900C |
| 廠商： | Lattice Semiconductor Corporation |
| 英文描述： | The ispXPGA architecture |
| 中文描述： | 在ispXPGA架構 |
| 文件頁數： | 41/89頁 |
| 文件大?。?/td> | 941K |
| 代理商： | LFX1200B-3F900C |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁當前第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁
Lattice Semiconductor
ispXPGA Family Data Sheet
41
Signal Descriptions
1
Signal Name
Signal Type
Description
General Purpose
BK
y
_IO
x
1,2
GCLK
n
/I
n
7
Input/Output
General purpose I/O number x in I/O Bank y
Global clock/input
8
Input
GSR
Input
Global Set/Reset
NC
—
No Connect
GND
GND
Ground
V
CC
V
CCJ
V
CCO
y
V
REF
y
D
XN,
D
XP
VCC
Core logic power supply
VCC
IEEE 1149.1 TAP power supply
2
VCC
I/O Bank y power supply
2
Input
I/O Bank y reference voltage
Output
Temperature Sensing Diodes, provide a differential voltage, which
corresponds to the temperature of the device.
Test and Program/Con
fi
guration
TMS
Input
Test Mode Select
TCK
Input
Test Clock
TDI
Input
Test Data In
TDO
Output
Test Data Out
TOE
Input
Test Output Enable tri-states all I/O pins
CFG0
Input
Selects the SRAM memory con
fi
guration type (Peripheral or
E
2
CMOS Refresh)
Initiates download from E
2
CMOS or the peripheral port to SRAM
memory (active low)
PROGRAMb
Input
DONE
Bi-directional
Indicates when con
fi
guration is complete
INITb
Bi-directional
Indicates the device is ready for programming (active low)
READ
Input
Selects the READ operation when in sysCONFIG mode
CCLK
Input
sysCONFIG Con
fi
guration Clock
CSb
Input
sysCONFIG Chip Select (active low)
DATA[0:7]
sysCLOCK PLL
3
PLL_FBK
z
PLL_RST
z
CLK_OUT
z
PLL_LOCK
z
Bi-directional
sysCONFIG Peripheral Port Data I/O
Input
Optional external feedback
Input
Optional external M divider reset
Internal Signal Clock output (routable to any I/O)
Internal Signal Lock output (routable to any I/O)
GND
P
V
CCP
sysHSI Block
4, 5
HSI
m
A_SINP, HSI
m
B_SINP
HSI
m
A_SINN, HSI
m
B_SINN
HSI
m
A_SOUTP, HSI
m
B_SOUTP
HSI
m
A_SOUTN, HSI
m
B_SOUTN
HSI
m
A_LOSS, HSI
m
B_LOSS
HSI
m
A_SYDT, HSI
m
B_SYDT
HSI
m
A_RECCLK, HSI
m
B_RECCLK
HSI
m
A_CDRLOCK, HSI
m
B_CDRLOCK
GND
PLL Ground
VCC
PLL power supply
Input
P-side of differential serial data input
Input
N-side of differential serial data input
Output
P-side of differential serial data output
Output
N-side of differential serial data output
Internal Signal Detects loss of signal
Internal Signal Symbol alignment detect
Internal Signal Recovered clock
Internal Signal Indicates when the CDR circuit is locked
相關PDF資料 |
PDF描述 |
|---|---|
| LFX1200B-03F900I | The ispXPGA architecture |
| LFX1200B-04F900C | The ispXPGA architecture |
| LFX1200C-4F900C | The ispXPGA architecture |
| LFX125B-4F900C | The ispXPGA architecture |
| LFX200B-4F900C | The ispXPGA architecture |
相關代理商/技術參數 |
參數描述 |
|---|---|
| LFX1200B-3F900I | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:The ispXPGA architecture |
| LFX1200B-3FE680C | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:ispXPGA Family |
| LFX1200B-3FE680I | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:ispXPGA Family |
| LFX1200B-3FH516C | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:ispXPGA Family |
| LFX1200B-3FH516I | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:ispXPGA Family |
發(fā)布緊急采購，3分鐘左右您將得到回復。