參數(shù)資料
型號(hào)： LFECP33E-3F256I
廠商： Lattice Semiconductor Corporation
英文描述： LatticeECP/EC Family Data Sheet
中文描述： LatticeECP / EC的系列數(shù)據(jù)手冊(cè)
文件頁數(shù)： 17/117頁
文件大小： 557K
代理商： LFECP33E-3F256I
2-14
Architecture
Lattice Semiconductor
LatticeECP/EC Family Data Sheet
Figure 2-16. Memory Core Reset
For further information on sysMEM EBR block, please see the details of additional technical documentation at the
end of this data sheet.
sysDSP Block
The LatticeECP-DSP family provides a sysDSP block making it ideally suited for low cost, high performance Digital
Signal Processing (DSP) applications. Typical functions used in these applications are Finite Impulse Response
(FIR)
fi
lters; Fast Fourier Transforms (FFT) functions, correlators, Reed-Solomon/Turbo/Convolution encoders and
decoders. These complex signal processing functions use similar building blocks such as multiply-adders and mul-
tiply-accumulators.
sysDSP Block Approach Compare to General DSP
Conventional general-purpose DSP chips typically contain one to four (Multiply and Accumulate) MAC units with
fi
xed data-width multipliers; this leads to limited parallelism and limited throughput. Their throughput is increased by
higher clock speeds. The LatticeECP, on the other hand, has many DSP blocks that support different data-widths.
This allows the designer to use highly parallel implementations of DSP functions. The designer can optimize the
DSP performance vs. area by choosing appropriate level of parallelism. Figure 2-17 compares the serial and the
parallel implementations.
Q
SET
D
L
CLR
Output Data
Latches
Q
D
Memory Core
Port A[17:0]
SET
Port B[17:0]
RSTB
GSRN
Programmable Disable
RSTA
L
CLR
相關(guān)PDF資料
PDF描述
LFEC33E-3F484C LatticeECP/EC Family Data Sheet
LFECP33E-3F484C LatticeECP/EC Family Data Sheet
LFEC33E-3F484I LatticeECP/EC Family Data Sheet
LFECP33E-3F484I LatticeECP/EC Family Data Sheet
LFEC33E-3F672C LatticeECP/EC Family Data Sheet
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LFECP33E-3F484C 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 32.8K LUTs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
LFECP33E-3F484I 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 32.8K LUTs 360 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
LFECP33E-3F672C 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 32.8K LUTs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
LFECP33E-3F672I 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 32.8K LUTs 496 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
LFECP33E-3F900C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
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