參數(shù)資料
型號: LFEC3E-4TN100I
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 96/163頁
文件大?。?/td> 0K
描述: IC FPGA 3.1KLUTS 100TQFP
標準包裝: 90
系列: EC
邏輯元件/單元數(shù): 3100
RAM 位總計: 56320
輸入/輸出數(shù): 67
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 100-LQFP
供應商設備封裝: 100-TQFP(14x14)
3-2
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
DC Electrical Characteristics
Over Recommended Operating Conditions
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
IIL, IIH
1
Input or I/O Leakage
0 VIN (VCCIO - 0.2V)
10
A
IIH
1, 3
Input or I/O High Leakage
(VCCIO - 0.2V) VIH 3.6V
40
A
IPU
I/O Active Pull-up Current
0 VIN 0.7 VCCIO
-30
-150
A
IPD
I/O Active Pull-down Current
VIL (MAX) VIN VIH (MAX)
30
150
A
IBHLS
Bus Hold Low sustaining current
VIN = VIL (MAX)
30
A
IBHHS
Bus Hold High sustaining current
VIN = 0.7VCCIO
-30
A
IBHLO
Bus Hold Low Overdrive current
0 VIN VIH (MAX)
150
A
IBHLH
Bus Hold High Overdrive current
0 VIN VIH (MAX)
-150
A
VBHT
Bus Hold trip Points
0 VIN VIH (MAX)
VIL (MAX)
VIH (MIN)
V
C1
I/O Capacitance
2
VCCIO = 3.3V, 2.5V, 1.8V, 1.5V, 1.2V,
VCC = 1.2V, VIO = 0 to VIH (MAX)
—8
pf
C2
Dedicated Input Capacitance
2
VCCIO = 3.3V, 2.5V, 1.8V, 1.5V, 1.2V,
VCC = 1.2V, VIO = 0 to VIH (MAX)
—6
pf
1. Input or I/O leakage current is measured with the pin configured as an input or as an I/O with the output driver tri-stated. It is not measured
with the output driver active. Bus maintenance circuits are disabled.
2. TA 25
oC, f = 1.0MHz
3. For top and bottom general purpose I/O pins, when VIH is higher than VCCIO, a transient current typically of 30ns in duration or less with a
peak current of 6mA can occur on the high-to-low transition. For left and right I/O banks, VIH must be less than or equal to VCCIO.
相關PDF資料
PDF描述
HSM43DSEF CONN EDGECARD 86POS .156 EYELET
HMM43DSEF CONN EDGECARD 86POS .156 EYELET
HSM43DRTF CONN EDGECARD 86POS DIP .156 SLD
HMM43DRTF CONN EDGECARD 86POS DIP .156 SLD
AMM22DRST CONN EDGECARD 44POS DIP .156 SLD
相關代理商/技術參數(shù)
參數(shù)描述
LFEC3E-4TN144C 功能描述:FPGA - 現(xiàn)場可編程門陣列 3.1K LUTs Pb-Free RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
LFEC3E-4TN144I 功能描述:FPGA - 現(xiàn)場可編程門陣列 3.1K LUTs 97 IO 1.2V -4 Spd I RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
LFEC3E-5F256C 功能描述:FPGA - 現(xiàn)場可編程門陣列 3.1K LUTs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
LFEC3E-5F256CES 功能描述:FPGA - 現(xiàn)場可編程門陣列 3.1 LUT 160 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
LFEC3E-5F256I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet