參數(shù)資料
型號(hào): LF48410JC30
廠商: LOGIC DEVICES INC
元件分類: 數(shù)字信號(hào)處理外設(shè)
英文描述: 1024 x 24-bit Video Histogrammer
中文描述: 24-BIT, DSP-HISTOGRAM PROCESSOR, PQCC84
封裝: PLASTIC, LCC-84
文件頁(yè)數(shù): 1/15頁(yè)
文件大小: 302K
代理商: LF48410JC30
DEVICES INCORPORATED
Video Imaging Products
1
LF48410
1024 x 24-bit Video Histogrammer
1024 x 24-bit Video Histogrammer
08/08/2000–LDS.48410-L
K
40 MHz Data Input and Compu-
tation Rate
K
1024 x 24-bit Memory Array
K
Histograms of Images up to 4K x
4K with 10-bit Pixel Resolution
K
Memory Array Flash Clear
K
User-Programmable Modes:
Histogram, Histogram Accumulate,
Look Up Table, Bin Accumulate,
Delay Memory, Delay and Subtract,
Single Port RAM
K
Replaces Harris HSP48410
K
84-pin PLCC, J-Lead
FEATURES
DESCRIPTION
DEVICES INCORPORATED
The
LF48410
is capable of generating
histograms and Cumulative Distribu-
tion Functions of video images. It
may also be used as a look up table, a
bin accumulator, a delay memory
(delay and subtract also possible), or a
single port RAM. The on-chip 1024 x
24-bit memory array facilitates
histograms of images up to 4K x 4K
pixels with a 10-bit pixel resolution.
Once the histogram of a video image
is stored in the memory array, the
Cumulative Distribution Function can
be calculated by putting the device in
Histogram Accumulate Mode.
Transformation functions can be
performed on pixel values when the
device is in Look Up Table Mode. If
the Cumulative Distribution Function
is the desired transformation func-
tion, the LF48410 can calculate it and
have it available for Look Up Table
Mode. When the device is in Delay
Memory Mode, it functions as a video
row buffer. In this mode, the LF48410
can buffer video lines as long as 1029
pixels. The device can also function
as an asynchronous single port RAM.
During asynchronous modes, the
device can be configured as a 1024 x
24, 1024 x 16, or 1024 x 8-bit RAM. A
Flash Clear function is provided
which sets all memory array locations
and data path registers to “0”.
LF48410 B
LOCK
D
IAGRAM
CLK
ADDRESS
GENERATOR
CONTROL
WR
RD
UWS
START
DIO
I/F
DIO
23-0
24
COUNTER
PIN
9-0
10
DIN
23-0
24
3
RAM ARRAY
DATA IN
DATA OUT
WR
ADDRESS
(TO ALL REGISTERS)
FC
FUNCTION
DECODE
FCT
2-0
LD
MUX CONTROL SIGNALS
IOA
9-0
10
3
ADDER
INPUT
CONTROL
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