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參數(shù)資料
| 型號(hào)： | LC8903 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Digital Audio Interface Receiver(數(shù)字音頻接口接收器) |
| 中文描述： | 數(shù)字音頻接口接收器（數(shù)字音頻接口接收器） |
| 文件頁數(shù)： | 7/15頁 |
| 文件大?。?/td> | 201K |
| 代理商： | LC8903 |
Pin Functions
No. 4542-7/15
LC8903, 8903Q
Pin No.
Symbol
I/O
Function
QIP
DIP
1
6
DIN5
I
Data input. There is no built-in amplifier on this pin.
2
7
DOUT1
O
EIAJ data through output
3
8
V/DOUT2
O
Validity flag output
Alternatively, the microprocessor interface can set this pin to output the EIAJ input data unchanged.
4
9
RC1
I
RC oscillator input
This circuit generates a clock used to detect incorrect PLL locking and to reset the PLL system.
RC oscillator output
This pin outputs a clock with a frequency of about 40 kHz when the component values specified in the sample
application circuit are used.
5
10
RC2
O
6
11
CLKMD
I
CLKOUT2 output clock switching: Low = 256 fs, high = 128 fs
7
12
CLK
I
Clock mode switching: Low = 384 fs, high = 512 fs
8
13
TEST1
I
Test pin (Should be tied low in normal operation.)
9
14
TEST2
I
10
15
XMODE
I
Used to start system operation after power is applied.
11
—
DV
DD
AV
DD
R
Digital power supply
12
16
Analog power supply
13
17
I
VCO oscillator band adjustment
14
18
AGND
Analog ground
15
19
VIN
I
VCO free-running setting
16
20
VCO
O
PLL low-pass filter
17
21
DGND
Digital system ground
18
22
SBSY
O
Subcode interface block sync signal
19
23
PW
O
Subcode interface data output
20
24
SFSY
O
Subcode interface frame sync signal
21
25
SBCK
I
Subcode interface bit clock input
22
26
DV
DD
XIN
Digital power supply
23
27
I
Crystal oscillator input
24
28
XOUT
O
Crystal oscillator output
25
29
CLK OUT1
O
Crystal oscillator and VCO clock output
26
30
CLK OUT2
O
256 fs and 128 fs clock output
27
31
ERROR
O
Error mute signal output
28
—
DGND
Digital ground
29
32
SUB1
O
Sampling frequency output
30
33
SUB2
O
31
34
BCLK
O
Bit clock output
32
35
DATA OUT
O
Audio data output
33
36
LRCK
O
Left/right clock output
34
37
EMPHA
O
High = emphasis on, low = emphasis off. Outputs a low level in analog mode.
35
38
DO
O
Microprocessor interface output
36
39
DI
I
Microprocessor interface input
37
40
CE
I
Microprocessor interface chip enable input
38
41
CL
I
Microprocessor interface clock input
39
42
DV
DD
DIN1
Digital power supply
40
1
I
41
2
DIN2
I
Data inputs with built-in amplifiers
42
3
DIN3
I
43
4
DIN4
I
44
5
DGND
Digital ground
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC8903/8903Q | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital Audio Interface Receiver |
| LC8903Q | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital Audio |
| LC8904 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Digital Audio Interface Receiver |
| LC8904Q | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Digital Audio Interface Receiver |
| LC89051V | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Digital Audio Interface Receiver |
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