參數(shù)資料
型號(hào)： LC72710LW
廠商： Sanyo Electric Co.,Ltd.
英文描述： Mobile FM Multiplex Broadcast (DARC) Receiver IC with On-Chip VICS Decoder(移動(dòng)FM多路廣播接收器芯片帶片上VICS譯碼器)
中文描述： 移動(dòng)調(diào)頻多路廣播（DARC）接收器集成電路片VICS解碼器（移動(dòng)調(diào)頻多路廣播接收器芯片帶片上VICS譯碼器）
文件頁(yè)數(shù)： 12/33頁(yè)
文件大小： 168K
代理商： LC72710LW
No. 6166-12/33
LC72710W, 72710LW
0
1
0
3
Reset
2
BIC
1
3
2
1
Received data
Synchronization
counter BIC position
*
Assumes that the forward and
back protection counts are 3.
Block
This IC detects the BIC characteristic inflection points which occur at four places in a single frame, and increments or
decrements a protection counter depending on whether or not they match the IC internal frame synchronization timing
counter.
As is the case with the block synchronization error protection value, applications must set these to values one less than
the desired protection count. The default values are 8 for the frame synchronization forward protection count and 2 for
the back protection count.
Frame Synchronization: Error Protection Count
Figure 1 Block Synchronization Protection Operation (Forward
→
Back
→
Forward)
Address
Register
R/W
Initial value
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
03H
SYNCF
W
17H
Back protection
(LSB)
Forward protection
(LSB)
*
: BIT0 and BIT1 are unused.
VEC_HALT
0: Vertical correction and the second horizontal correction processing are performed. (default)
1: Vertical correction and the second horizontal correction processing are not performed.
All IC operations related to vertical correction and the second horizontal correction are stopped by setting this flag.
Note that in data output, only data to which the first horizontal correction has been applied will be output.
EC_STOP
0: All functions operate. (default)
1: Only the MSK detection circuit and the synchronization regeneration circuit operate.
This flag stops all operations relating to error correction (including RAM access), data output, and other operations.
While all IC operations are stopped in standby mode, MSK demodulation, the synchronization circuit, the serial data
input circuit, and the layer 4 CRC circuit continue to operate in this mode.
SYNC_RST
0: (default)
1: Resets just the synchronization regeneration circuit.
Clears the synchronization status and the synchronization protection status in the synchronization circuit block, and
sets the circuit to the unsynchronized state. This allows the circuit to quickly pull in to frame synchronization when
the frame synchronization is incorrect for the new reception data following tuning, when the radio has been tuned to
a new station. While this flag is used for synchronization related sections of the system, it does not initialize the
registers that set the number of allowable BIC errors, the block synchronization forward and back protection counts,
and the frame synchronization forward and back protection counts. Also note that during a synchronization block
reset, the INT signal is not output and the DO pin outputs a high level (high-impedance).
This flag is not automatically reset to 0. Applications must send a 0 value after setting this flag.
Control Register 1
Address
Register
R/W
Initial value
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
04H
CTL1
W
00H
CRC4_RST
DO_MOVE
INT_MOVE SYNC_RST
EC_STOP
VEC_HALT
*
*
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LC72710W 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Mobile FM Multiplex Broadcast DARC Receiver IC with On-Chip VICS Decoder
LC72711LW 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Mobile FM Multiplex Broadcast DARC Receiver IC
LC72711LW-E 制造商:ON Semiconductor 功能描述:DARC DECODE-LSI - Trays
LC72711LWHS-E 功能描述:射頻接收器 RoHS:否 制造商:Skyworks Solutions, Inc. 類型:GPS Receiver 封裝 / 箱體:QFN-24 工作頻率:4.092 MHz 工作電源電壓:3.3 V 封裝:Reel
LC72711W 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Mobile FM Multiplex Broadcast DARC Receiver IC
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