參數(shù)資料
型號: LC72336
廠商: Sanyo Electric Co.,Ltd.
英文描述: Single-Chip Microcontrollers with Built-In LCD Driver and PLL Circuits
中文描述: 單片微控制器,內(nèi)置在LCD驅(qū)動和PLL電路
文件頁數(shù): 7/16頁
文件大?。?/td> 185K
代理商: LC72336
Continued from preceding page.
No. 5157-7/16
LC72336, 72338
Pin No.
Symbol
I/O
I/O type
Function
6
5
4
3
1
80
77
78
76
31, 73
75
74
PG0
PG1/SCK0
PG2/SO0
PG3/SI0
XIN
XOUT
EO1
EO2
V
SS
V
DD
AMIN
FMIN
I/O
I
O
O
I
I
CMOS push-pull
CMOS tristate
CMOS amplifier
input
CMOS amplifier
input
Shared-function general-purpose output and serial I/O port
Inputs are a Schmitt input.
The IOS instruction is used to switch between the general-purpose I/O port function and
the serial I/O function, as well as between input and output for the general-purpose I/O
port function.
When used as a general-purpose I/O port:
Input or output can be specified in bit units (bit I/O).
These ports are set up to be general-purpose I/O ports with the IOS instruction
with Pn = 0.
b0 = SI/O0
0 ... General-purpose ports
1 ... SI/O ports
The IOS instruction is used to specify input or output in bit units.
PG ... Pn = 6
0 ... Input
1 ... Output
When used as a serial I/O port:
These ports are set up to be serial I/O ports with the IOS instruction with Pn = 0.
The contents of the serial I/O data buffers can be saved and loaded with the INR and
OUTR instructions.
Note: Pin setup states when used as serial I/O ports:
PG0 ... General-purpose I/O
PG1 ... SCK0 output in internal clock mode
SCK0 input in external clock mode
PG2 ... SO0 output
PG3 ... SI0 input
These ports go to the input disabled high-impedance state in clock stop mode.
These ports function as general-purpose input ports after a power-on reset.
4.5 MHz crystal oscillator connections
Charge pump outputs
These pins go to the high-impedance state when the HOLD pin is set low in the hold
enable state.
These pins go to the high-impedance state in clock stop mode, after a power-on reset,
and in the PLL stopped state.
Power supply connections
AM VCO (local oscillator) input
This pin is selected and the band set using the PLL instruction CW1 (b1 and b0) field.
The input signal must be capacitor coupled.
Input is disabled if the HOLD pin is set low in the HOLD enabled state.
Input is disabled in clock stop mode, after a power-on reset, and in the PLL stopped state.
FM VCO (local oscillator) input
This pin is selected using the PLL instruction CW1 field (b1 = 0, b0 = don’t care).
The input signal must be capacitor coupled.
Input is disabled if the HOLD pin is set low in the HOLD enabled state.
Input is disabled in clock stop mode, after a power-on reset, and in the PLL stopped state.
Continued on next page.
b1
b0
Band
1
0
2 to 40 MHz (SW)
1
1
0.5 to 10 MHz (MW, LW)
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