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參數(shù)資料
| 型號： | LC72336 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Single-Chip Microcontrollers with Built-In LCD Driver and PLL Circuits |
| 中文描述： | 單片微控制器，內(nèi)置在LCD驅(qū)動和PLL電路 |
| 文件頁數(shù)： | 15/16頁 |
| 文件大小： | 185K |
| 代理商： | LC72336 |
Continued from preceding page.
No. 5157-15/16
LC72336, 72338
Mnemonic
Operand
Function
Operation
Machine code
1st
2nd
D15 14 13 12 11 10 9 8
7 6 5 4
3 2 1 D0
AND
r
M
AND M with r
r
←
(r) AND (M)
M
←
(M) AND I
r
←
(r) OR (M)
M
←
(M) OR I
r
←
(r) XOR (M)
M
←
(M) XOR I
r
←
(M)
M
←
(r)
0
0
1
0
0
0
D
H
D
H
D
H
D
H
D
H
D
H
D
H
D
H
D
L
D
L
D
L
D
L
D
L
D
L
D
L
D
L
r
ANDI
M
I
AND I with M
0
0
1
0
0
1
I
OR
r
M
OR M with r
0
0
1
0
1
0
r
ORI
M
I
OR I with M
0
0
1
0
1
1
I
EXL
r
M
Exclusive OR M with r
0
0
1
1
0
0
r
EXLI
M
I
Exclusive OR I with M
0
0
1
1
0
1
I
LD
r
M
Load M to r
1
1
0
1
0
0
r
ST
M
r
Store r to M
1
1
0
1
0
1
r
Move M to destination
M referring to r in
the same row
MVRD
r
M
[D
H
, Rn]
←
(M)
1
1
0
1
1
0
D
H
D
L
r
Move source M
referring to r to M in
the same row
MVRS
M
r
M
←
[D
H
, Rn]
1
1
0
1
1
1
D
H
D
L
r
MVSR
M1
M2
Move M to M in
the same row
[D
H
, D
L
1]
←
[D
H
, D
L
2]
1
1
1
0
0
0
D
H
D
L
1
D
L
2
MVI
M
I
Move I to M
M
←
I
1
1
1
0
0
1
D
H
D
L
I
Test M bits, then skip
if all bits specified
are true
if M (N) = all “1”,
then skip
TMT
M
N
1
1
1
1
0
0
D
H
D
L
N
Test M bits, then skip
if all bits specified
are false
if M (N) = all “0”,
then skip
TMF
M
N
1
1
1
1
0
1
D
H
D
L
N
JMP
ADDR
Jump to the address
PC
←
ADDR
Stack
←
(PC) + 1
PC
←
Stack
1
0
0
ADDR (13 bits)
CAL
ADDR
Call subroutine
1
0
1
ADDR (13 bits)
RT
Return from subroutine
0
0
0
0
0
0
0 0
1 0 0 0
RTS
Return from subroutine
and skip
PC
←
Stack + 1
0
0
0
0
0
0
0 0
1 0 1 0
RTB
Return from subroutine
with bank data
PC
←
Stack
BANK
←
Stack
PC
←
Stack + 1
BANK
←
Stack
PC
←
Stack
BANK
←
Stack
CARRY
←
Stack
(Status reg I)
N
←
1
(Status reg I)
N
←
0
if (Status reg I) N = all “1”,
then skip
1
1
1
1
1
1
1 1
1 1 0 0
RTBS
Return from subroutine
with bank data and skip
1
1
1
1
1
1
1 1
1 1 0 1
RTI
Return from interrupt
0
0
0
0
0
0
0 0
1 0 0 1
SS
I
N
Set status register
1
1
1
1
1
1
1 1
0 0 0
I
N
RS
I
N
Reset status register
1
1
1
1
1
1
1 1
0 0 1
I
N
TST
I
N
Test status register true
1
1
1
1
1
1
1 1
0 1
I
N
TSF
I
N
Test status register false
if (Status reg I) N = all “0”,
then skip
1
1
1
1
1
1
1 1
1 0
I
N
Test unlock F/F
then skip if it has
not been set
if Unlock F/F (N) = all “0”,
then skip
TUL
N
0
0
0
0
0
0
0 0
1 1 0 1
N
PLL
M
r
Load M to PLL registers
PLL reg
←
PLL data
1
1
1
1
1
0
D
H
D
L
r
DAC
I
DAC reg
←
DAC data
0
0
0
0
0
0
0 0
0 0 1 1
I
INR
M
Rn
Input register/port data to M
M
←
(Rn reg)
0
0
1
1
1
0
D
H
D
L
Rn
OUTR
M
Rn
Output contents of M
to register/port
Rn reg
←
(M)
0
0
1
1
1
1
DH
DL
Rn
I
g
L
i
T
B
i
J
F
i
S
i
I
i
Continued on next page.
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| LC72341 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Low-Voltage Single-Chip Microcontrollers with On- Chip PLL and LCD Driver Circuits |
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