參數(shù)資料
型號: LC72336
廠商: Sanyo Electric Co.,Ltd.
英文描述: Single-Chip Microcontrollers with Built-In LCD Driver and PLL Circuits
中文描述: 單片微控制器,內(nèi)置在LCD驅(qū)動和PLL電路
文件頁數(shù): 5/16頁
文件大?。?/td> 185K
代理商: LC72336
Electrical Characteristics
for the Allowable Operating Ranges
Note:
*
In case of instruction execution for 20 steps at intervals of 1 ms, with the PLL, counter functions and other functions all stopped.
No. 5157-5/16
LC72336, 72338
Parameter
Symbol
Conditions
min
typ
max
Unit
I
IH
(1)
I
IH
(2)
XIN: V
I
= V
DD
= 5.0 V
FMIN, AMIN, HCTR, LCTR: V
I
= V
DD
= 5.0 V
Ports PA, PE, PF, PG, PH, PK, and PM, SNS, HOLD,
HCTR, LCTR: No pull-down resistors on port PA,
V
I
= V
DD
= 5.0 V, with input mode selected
for ports PE, PF, PG, PK, and PM
2.0
5.0
15
μA
4.0
10
30
μA
Input high-level current
I
IH
(3)
3.0
μA
I
IH
(4)
I
IL
(1)
I
IL
(2)
With pull-down resistors on port PA, V
I
= V
DD
= 5.0 V
XIN: V
I
= V
SS
FMIN, AMIN, HCTR, LCTR: V
I
= V
SS
Ports PA, PE, PF, PG, PH, PK, and PM, SNS, HOLD,
HCTR, LCTR: No pull-down resistors on port PA,
V
I
= V
SS
, with input mode selected
for ports PE, PF, PG, PK, and PM
50
μA
2.0
5.0
15
μA
4.0
10
30
μA
Input low-level current
I
IL
(3)
3.0
μA
Input floating voltage
V
IF
With pull-down resistors on port PA
0.05 V
DD
V
k
Pull-down resistance
R
PD
(1)
With pull-down resistors on port PA, V
DD
= 5 V
Ports PF, PG, and PK, LCTR
(in frequency measurement mode)
75
100
200
Hysteresis
V
H
0.1 V
DD
0.2 V
DD
V
V
OH
(1)
V
OH
(2)
V
OH
(3)
V
OH
(4)
V
OH
(5)
V
OH
(6)
V
OL
(1)
V
OL
(2)
V
OL
(3)
V
OL
(4)
V
OL
(5)
V
OL
(6)
V
OL
(7)
Ports PB and PC: I
O
= –1 mA
Ports PE, PF, PG, PK, PM, and PN: I
O
= –1 mA
EO1, EO2: I
O
= –500 μA
XOUT: I
O
= –200 μA
S1 to S32: I
O
= –20 μA
COM1, COM2, COM3: I
O
= –100 μA
Ports PB and PC: I
O
= 50 μA
Ports PE, PF, PG, PK, PM, and PN: I
O
= 1 mA
EO1, EO2: I
O
= 500 μA
XOUT: I
O
= 200 μA
S1 to S32: I
O
= 20 μA
COM1, COM2, COM3: I
O
= 100 μA
Port PJ: I
O
= 5 mA
V
DD
– 2.0
V
DD
– 1.0
V
DD
– 1.0
V
DD
– 1.0
V
DD
– 1.0
V
DD
– 1.0
V
V
Output high-level voltage
V
V
V
V
2.0
V
1.0
V
1.0
V
Output low-level voltage
1.0
V
1.0
V
1.0
V
0.75
2.0
V
V
MID
(1)
S1 to S32: I
O
= ±20 μA
2/3 V
DD
±
V
1.0
V
MID
(2)
S1 to S32: I
O
= ±20 μA
1/3 V
DD
±
V
Output mid-level voltage
1.0
V
MID
(3)
COM1, COM2, COM3: I
O
= ±100 μA
2/3 V
DD
±
V
1.0
V
MID
(4)
COM1, COM2, COM3: I
O
= ±100 μA
1/3 V
DD
±
V
1.0
I
OFF
(1)
I
OFF
(2)
I
OFF
(3)
Ports PE, PF, PG, PK, PM, and PN
–3.0
+3.0
μA
Output off leakage current
EO1 , EO2
–100
+100
nA
Port PJ
–5.0
+5.0
μA
AD conversion error
ADI0 to ADI3: V
DD
(1)
SNS
–1/2
+1/2
LSB
Reject pulse width
P
REJ
V
DET
R
PD
(2)
I
DD
(1)
I
DD
(2)
I
DD
(3)
I
DD
(4)
50
μs
Power-down detection voltage
2.7
3.0
3.3
V
k
mA
Pull-down resistance
TEST1, TEST2
10
V
DD
(1): f
IN
(2) = 130 MHz, Ta = 25°C
V
DD
(2): halt mode
*
, Ta = 25°C (Fig. 1)
V
DD
= 5.5 V, oscillator stopped, Ta = 25°C (Fig. 2)
V
DD
= 2.5 V, oscillator stopped, Ta = 25°C (Fig. 2)
12
Current drain
0.45
mA
5
μA
1
μA
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