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參數(shù)資料
| 型號： | LC72322N |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Single-Chip Microcontroller with Built-in LCD Driver and PLL Circuits(用于電子調諧的單片微控制器（帶內置LCD驅動器和鎖相環(huán)電路 ）) |
| 中文描述： | 單片微控制器，帶有內置LCD驅動器和PLL電路（用于電子調諧的單片微控制器（帶內置液晶顯示驅動器和鎖相環(huán)電路）） |
| 文件頁數(shù)： | 12/13頁 |
| 文件大?。?/td> | 202K |
| 代理商： | LC72322N |
Continued from preceding page.
No. 5945-12/13
LC72321N, 72322N, 72323N
Mnemonic
Operands
Function
Operation
Machine code
1st
2nd
D15 14 13 12
11 10 9 8
7 6 5 4
3 2 1 D0
AND
M
I
AND I with M
M
←
(M)
Λ
I
M
←
(M)
Λ
I
r
←
(r)
⊕
(M)
r
←
(M)
M
←
(r)
0 0 1 1
0 0 DH
DL
I
OR
M
I
ORI with M
0 0 1 1
1 0 DH
DL
I
EXL
r
M
Exclusive OR M with r
0 0 1 0
0 0 DH
DL
Rn
LD
r
M
Load M to r
1 0 0 0
0 0 DH
DL
Rn
ST
M
r
Store r to M
1 0 0 0
0 1 DH
DL
Rn
Move M to destination
M referring to r in
the same row
MVRD
r
M
(DH, Rn)
←
(M)
1 0 0 0
1 0 DH
DL
Rn
Move source M
referring to r to M in
the same row
MVRS
M
r
M
←
(DH, Rn)
1 0 0 0
1 1 DH
DL
Rn
MVSR
M1
M2
Move M to M in the
same row
(DH, DL1)
←
(DH, DL2)
1 0 0 1
0 0 DH
DL1
DL2
MV1
M
I
Move I to M
M
←
I
1 0 0 1
0 1 DH
DL
I
PLL
M
r
Load M to PLL
registers
PLL r
←
PLL DATA
1 0 0 1
1 0 DH
DL
Rn
Test M bits, then skip
if all bits specified
are true
if M (N) = all 1,
then skip
TMT
M
N
1 0 1 0
0 1 DH
DL
N
Test M bits, then skip
if all bits specified
are false
if M (N) = all 0,
then skip
TMF
M
N
1 0 1 0
1 1 DH
DL
N
JMP
ADDR
Jump to the address
PC
←
ADDR
Stack
←
(PC) + 1
PC
←
Stack
1 0 1 1
ADDR (12 bits)
CAL
ADDR
Call subroutine
1 1 0 0
ADDR (12 bits)
RT
Return from subroutine
1 1 0 1
0 1 0 0
0 0 0 0
0 0 0 0
PC
←
Stack
BANK
←
Stack
CARRY
←
Stack
RTI
Return from interrupt
1 1 0 1
0 1 0 1
0 0 0 0
0 0 0 0
Test timer F/F
then skip if it has
not been set
if timer F/F = 0,
then skip
TTM
N
1 1 0 1
0 1 1 0
0 0 0 0
N
Test unlock F/F
then skip if it has
not been set
if UL F/F = 0,
then skip
TUL
N
1 1 0 1
0 1 1 1
0 0 0 0
N
SS
N
Set status register
(Status register 1)
N
←
1
1 1 0 1
1 1 0 0
0 0 0 0
N
RS
N
Reset status register
(Status register 1)
N
←
0
1 1 0 1
1 1 0 1
0 0 0 0
N
TST
N
Test status register
true
if (Status register 2)
N = all 1, then skip
1 1 0 1
1 1 1 0
0 0 0 0
N
TSF
N
Test status register
false
if (Status register 2)
N = all 0, then skip
1 1 0 1
1 1 1 1
0 0 0 0
N
BANK
B
Select Bank
BANK
←
B
1 1 0 1
0 0 B
0 0 0 0
0 0 0 0
Continued on next page.
Instruction
group
L
o
i
T
B
J
i
F
i
S
B
s
i
相關PDF資料 |
PDF描述 |
|---|---|
| LC72322 | Single-Chip Microcontroller with PLL and LCD Driver |
| LC72323-XXXX | LED RED/AMBR DIFFUSED(WHITE)RND |
| LC72323 | Single-Chip Microcontroller with PLL and LCD Driver |
| LC72323R | Single-Chip Microcontroller with PLL and LCD Driver |
| LC7232N | CLAMP, CAPACITOR; Centres, fixing:57mm; Diameter, clip:40mm; Length / Height, external:14mm RoHS Compliant: Yes |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LC72322R | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Single-Chip Microcontroller with PLL and LCD Driver |
| LC72323 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Single-Chip Microcontroller with PLL and LCD Driver |
| LC72323N | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:LC72321N |
| LC72323R | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Single-Chip Microcontroller with PLL and LCD Driver |
| LC72323-XXX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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