參數(shù)資料
型號(hào): LC72151V
元件分類(lèi): PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 40 MHz, PDSO30
封裝: SSOP-30
文件頁(yè)數(shù): 10/29頁(yè)
文件大?。?/td> 326K
代理商: LC72151V
No. 6976-18/29
LC72151V
Serial data timing
tCL
tEH
tES
tHD
tSU
tLC
tDH
tDC
tEL
tCH
VIL
VIH
VIL
DO
Internal
data latch
operation
Old
New
Internal
data latch
operation
Old
New
CL
DI
CE
tCH
tEH
tES
tHD
tSU
tLC
tDH
tDC
tEL
tCL
VIL
VIH
VIL
DO
CL
DI
CE
<When CL is stopped at the low level>
<When CL is stopped at the high level>
Parameter
Symbol
Pin
Conditions
Ratings
Unit
min
typ
max
Data setup time
tSU
DI, CL
0.45
s
Data hold time
tHD
DI, CL
0.45
s
Clock low-level period
tCL
CL
0.45
s
Clock high-level period
tCH
CL
0.45
s
CE wait time
tEL
CE, CL
0.45
s
CE setup time
tES
CE, CL
0.45
s
CE hold time
tEH
CE, CL
0.45
s
Data latch change time
tLC
0.45
s
Data output time
tDC
DO, CL
Depends on the value of the pull-up
0.2
s
tDH
DO, CE
resistor used.
Allowable Operating Ranges at Ta = –40 to 85°C, VSS = 0 V
Note: See the timing chart for serial data transfers.
相關(guān)PDF資料
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