參數(shù)資料
型號: LC7185-8750
元件分類: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 30 MHz, PDIP30
封裝: SDIP-30
文件頁數(shù): 7/12頁
文件大小: 152K
代理商: LC7185-8750
Pin Descriptions
TX
Transmit/receive select
PD
Charge pump output
HOLD
Hold mode select
NC
NC pin
INIT
Initial input
SA to SG
Segment driver (for display)
TEST
Test point (input)
D1, D2
Digit output (for display)
VDD,VSS1, VSS2
Power supply
KI1 to KI4
Key inputs
PIN
Programmable divider input
KO1 to KO3
Key scan outputs
XIN, XOUT
Crystal oscillator input, output
(10.240 MHz)
BEEP
Beep-tone control output
UL
Unlock detection signal output
Key Matrix
CH9
Emergency CH9 recall
ME
Station Memory Enable
CH19
Emergency CH19 recall
M1 to M5
Station Memory recall
PA
Public announcement display
UP/DN/ME/M1 to 5
Momentary SW
MODE 1/2
Display Mode
CH9/CH19/PA
Slide SW
UP
CH up/scan
MODE 1/2
Diode
DN
CH down/scan
LED Display Configuration (Common anode/7 segment)
LC7185-8750
No. 3356-4/12
相關(guān)PDF資料
PDF描述
LC7185-8750 PLL FREQUENCY SYNTHESIZER, 30 MHz, PDIP30
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LC72151V PLL FREQUENCY SYNTHESIZER, 40 MHz, PDSO30
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