- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄358752 > LC322271J (Sanyo Electric Co.,Ltd.) 2 MEG (131072 words X 16 bits) DRAM Fast Page Mode, Byte Write PDF資料下載
參數(shù)資料
| 型號(hào)： | LC322271J |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | 2 MEG (131072 words X 16 bits) DRAM Fast Page Mode, Byte Write |
| 中文描述： | 2邁可（131072字× 16位），內(nèi)存快速頁面模式，字節(jié)寫 |
| 文件頁數(shù)： | 6/29頁 |
| 文件大?。?/td> | 1151K |
| 代理商： | LC322271J |
第1頁第2頁第3頁第4頁第5頁當(dāng)前第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁
Input/Output Capacitance
at Ta = 25°C, f = 1 MHz, V
CC
= 5 V ± 10%
Note:
6. An initial pause of 200 μs is required after power-up followed by eight RAS-only refresh cycles before proper device operation is achieved. In case
of using refresh counter, a minimum of eight CAS-before-RAS refresh cycles instead of eight RAS-only refresh cycles are required.
7. Measured at t
T
= 5 ns.
8. When measuring input signal timing, V
IH
(min) and V
IL
(max) are used for reference points. In addition, rise and fall time are defined between V
IH
and V
IL
.
9. Measured using an equivalent of 50 pF and one standard TTL loads.
10. t
OFF
(max) and t
OEZ
(max) are defined as the time until output voltage can no longer be measured when output switches to a high impedance
condition.
11. Operation is guaranteed if either t
RRH
or t
RCH
is satisfied.
12. These parameters are measured from the falling edge of CAS for an early-write cycle, and from the falling edge of UW and LW for a read-
write/read-modify-write cycle.
13. t
WCS
, t
CWD
, t
RWD
, t
AWD
and t
CPWD
are not restrictive operating parameters for memory in that they specify the operating mode. If t
WCS
≥
t
WCS
(min), the cycle switches to an early-write cycle and output pins switch to high impedance throughout the cycle.
If t
CWD
≥
t
CWD
(min), t
RWD
≥
t
RWD
(min), t
AWD
≥
t
AWD
(min) and t
CPWD
≥
t
CPWD
(min) for fast page mode cycle only, the cycle switches to a
read-write/read-modify-write cycle and data output equal information in the selected cells. If neither of the above timings are satisfied, output pins
are in an undefined state.
14. t
RCD
(max) is not a restrictive operating parameter but instead represents the point at which the access time t
RAC
(max) is guaranteed. If t
RCD
≥
t
RCD
(max), access time is determined according to t
CAC
.
15. t
RAD
(max) is not a restrictive operating parameter but instead represents the point at which the access time t
RAC
(max) is guaranteed. If t
RAD
≥
t
RAD
(max), access time is determined according to t
AA
.
16. Operation is guaranteed if either t
DZC
or t
DZO
i s satisfied.
No. 5085-6/29
LC322271J, M, T-70/80
Parameter
Symbol
min
max
Unit
Note
Input capacitance (A0 to A7, A8R, RAS, CAS, UW, LW, OE)
C
IN
C
I/O
7
pF
Input/Output capacitance (I/O1 to I/O16)
7
pF
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LC32464M-80 | 256K (65536 words X 4 bits) DRAM Fast Page Mode |
| LC32464P | 256K (65536 words X 4 bits) DRAM Fast Page Mode |
| LC32A | QUADRUPLE 2-INPUT POSITIVE-OR GATES |
| LC331632M-12 | 512K (32768 words X 16 bits) Pseudo-SRAM |
| LC331632M-70 | 512K (32768 words X 16 bits) Pseudo-SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC322271J-70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| LC322271J-80 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 Fast Page Mode DRAM |
| LC322271M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:2 MEG (131072 words X 16 bits) DRAM Fast Page Mode, Byte Write |
| LC322271M-70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| LC322271M-80 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 Fast Page Mode DRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。