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參數(shù)資料
| 型號： | LAN8187I |
| 廠商： | SMSC Corporation |
| 英文描述： | High-Performance MII and RMII 10/100 Ethernet PHY with HP Auto-MDIX |
| 中文描述： | 高性能信息產(chǎn)業(yè)部及RMII 10/100以太網(wǎng)PHY與HP Auto - MDIX功能 |
| 文件頁數(shù)： | 24/66頁 |
| 文件大?。?/td> | 545K |
| 代理商： | LAN8187I |
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High-Performance MII and RMII 10/100 Ethernet PHY with HP Auto-MDIX
Datasheet
Revision 0.6 (02-24-06)
24
SMSC LAN8187/LAN8187I
DATASHEET
4.4.2
Manchester Encoding
The 4-bit wide data is sent to the TX10M block. The nibbles are converted to a 10Mbps serial NRZI
data stream. The 10M PLL locks onto the external clock or internal oscillator and produces a 20MHz
(TX_EN is low), the TX10M block outputs Normal Link Pulses (NLPs) to maintain communications with
the remote link partner.
4.4.3
10M Transmit Drivers
The Manchester encoded data is sent to the analog transmitter where it is shaped and filtered before
being driven out as a differential signal across the TXP and TXN outputs.
4.5
10Base-T Receive
The 10Base-T receiver gets the Manchester- encoded analog signal from the cable via the magnetics.
It recovers the receive clock from the signal and uses this clock to recover the NRZI data stream. This
10M serial data is converted to 4-bit data nibbles which are passed to the controller across the MII at
a rate of 2.5MHz.
This 10M receiver uses the following blocks:
Filter and SQUELCH (analog)
10M PLL (analog)
RX 10M (digital)
MII (digital)
4.5.1
10M Receive Input and Squelch
The Manchester signal from the cable is fed into the PHY (on inputs RXP and RXN) via 1:1 ratio
magnetics. It is first filtered to reduce any out-of-band noise. It then passes through a SQUELCH
circuit. The SQUELCH is a set of amplitude and timing comparators that normally reject differential
voltage levels below 300mV and detect and recognize differential voltages above 585mV.
4.5.2
Manchester Decoding
The output of the SQUELCH goes to the RX10M block where it is validated as Manchester encoded
data. The polarity of the signal is also checked. If the polarity is reversed (local RXP is connected to
RXN of the remote partner and vice versa), then this is identified and corrected. The reversed condition
is indicated by the flag “XPOL“, bit 4 in register 27. The 10M PLL is locked onto the received
Manchester signal and from this, generates the received 20MHz clock. Using this clock, the
Manchester encoded data is extracted and converted to a 10MHz NRZI data stream. It is then
converted from serial to 4-bit wide parallel data.
The RX10M block also detects valid 10Base-T IDLE signals - Normal Link Pulses (NLPs) - to maintain
the link.
4.5.3
10M Receive Data Across the MII/RMII Interface
For MII, the 4 bit data nibbles are sent to the MII block. In MII mode, these data nibbles are valid on
the rising edge of the 2.5 MHz RX_CLK.
For RMII, the 2bit data nibbles are sent to the RMII block. In RMII mode, these data nibbles are valid
on the rising edge of the RMII REF_CLK.
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