參數(shù)資料
型號(hào)： LA17000M
元件分類(lèi)： 接收器
英文描述： AM/FM, AUDIO SINGLE CHIP RECEIVER, PQFP80
封裝： 14 X 14 MM, QFP-80
文件頁(yè)數(shù)： 34/54頁(yè)
文件大?。?/td> 830K
代理商： LA17000M
LA17000M
No. 6522-4/54
Continued from preceding page.
Parameter
Symbol
Conditions
Ratings
min
typ
max
Unit
SD sensitivity
SD-sen1AM
27
33
39
dB
V
SD-sen2AM
1 MHz, ANT input level at which SD pin turns on
27
33
39
dB
V
IF buffer output
VIFBUFF-AM
1 MHz, 74 dB
V, non-mod, pin 38 output
150
220
mVrms
PLL Block
Allowable Operating Ranges at Ta = –40 to +85°C, VDD = 5 V, VSS = 0 V
Parameter
Symbol
Conditions
Ratings
min
typ
max
Unit
High-level input voltage
VIH1
CE, CL, DI, I/O-1, I/O-2
2.2
VDD + 0.3
V
Low-level Input voltage
VIL1
CE, CL, DI, I/O-1, I/O-2, SDSTSW
0
0.8
V
Output voltage
VO1
DO
0
6.5
V
VO2
I/O-1, I/O-2
0
13
V
Input amplitude
fIN1XIN; Sine wave, capacitor coupled
1
8
MHz
fIN2
PLLIN; Sine wave, capacitor coupled
10
160
MHz
fIN3
HCTR; Sine wave, capacitor coupled
0.4
25
MHz
X’tal
10.1
10.5
MHz
Input amplitude
VIN1XIN
200
1500
mVrms
VIN2-1
PLLIN; 10
≤ f < 130 MHz; Note 2
40
1500
mVrms
VIN2-2
PLLIN; 130
≤ f <160 MHz; Note 2
70
1500
mVrms
VIN3-1
40
1500
mVrms
VIN3-2
70
1500
mVrms
Data setup time
tSU
DI, CL: Note 5
0.45
s
Data hold time
tHD
DI, CL: Note 5
0.45
s
Clock low-level time
tCL
CL: Note 5
0.45
s
Clock high-level time
tCH
CL: Note 5
0.45
s
CE wait time
tEL
CE, CL: Note 5
0.45
s
CE setup time
tES
CE, CL: Note 5
0.45
s
CE hold time
tEH
CE, CL: Note 5
0.45
s
Data latch change time
tLC
Note 5
0.45
s
Data output time
tDC
0.2
s
tDH
0.2
s
Note 1:
Recommended CI value for crystal oscillator
CI
≤ 70 (X’tal: 10.25, 10.35 MHz)
However, because the characteristics of the X’tal oscillation circuit depend on the board and circuit constants,
we recommend requesting that the X’tal manufacturer perform the evaluation.
Note 2:
Refer to the program divider configuration.
Note 3:
Serial data: CTC = 0
Note 4:
Serial data: CTC = 1
Note 5:
Refer to the serial data timing.
Guaranteed crystal oscillator
ranges
XIN, XOUT; CI
≤ 70
(X’tal: 10.25, 10.35 MHz); Note 1
HCTR; 0.4
≤ f < 25 MHz: Serial data;
CTC = 0: Note 3
HCTR; 8
≤ f <12MHz: Serial data;
CTC = 1: Note 4
DO, CL; Dependent on pull-up resistance,
board capacity: Note 5
DO, CL; Dependent on pull-up resistance,
board capacity: Note 5
1 MHz, ANT input level at which IF count
output turns on
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