參數(shù)資料
型號： L9805
廠商： 意法半導體
元件分類： 基準電壓源/電流源
英文描述： Super Smart Power Motor Driver with 8-BIT MCU, CAN Interface, 16K EPROM, 256Bytes RAM, 128 Bytes EEPROM, 10 Bit ADC, WDG, 2 Timers, 2 PWM Modules, Ful
中文描述： 超級智能型電動馬達驅(qū)動器，帶有8位微控制器，CAN接口，16K的存儲器，256Bytes RAM內(nèi)存，128字節(jié)EEPROM，10位ADC，水分散粒劑，2定時器，2個PWM模塊，涪陵
文件頁數(shù)： 32/103頁
文件大?。?/td> 853K
代理商： L9805
32/103
L9805
5.2 16-BIT TIMER
5.2.1 Introduction
The timer consists of a 16-bit free-running counter
driven by a programmable prescaler.
It may be used for a variety of purposes, including
pulse length measurement of up to two input sig-
nals (input capture) or generation of up to two out-
put waveforms (output compareand PWM).
Pulse lengths and waveform periods can be mod-
ulated from a few microseconds to several milli-
seconds using the timer prescaler and the CPU
clock prescaler.
5.2.2 Main Features
I
Programmable prescaler: f
cpu
divided by 2, 4 or 8.
I
Overflow status flag and maskable interrupt
I
External clock input (must be at least 4 times
slower than the CPU
clock speed) with the choice
of active edge
I
Output compare functions with
– 2 dedicated 16-bit registers
– 2 dedicated programmable signals
– 2 dedicated status flags
– 1 dedicated maskable interrupt
I
Input capture functions with
– 2 dedicated 16-bit registers
– 2 dedicated active edge selection signals
– 2 dedicated status flags
– 1 dedicated maskable interrupt
I
Pulse width modulation mode (PWM)
I
One pulse mode
I
5 alternate functions on I/O ports
The Block Diagram is shown in Figure 16, on
page 33.
Note:
Some external pins are not available on all
devices. Refer to the device pin out description.
5.2.3 Functional Description
5.2.3.1 Counter
The principal block of the Programmable Timer is
a 16-bit free running counter and its associated
16-bit registers:
Counter Registers
– Counter High Register (CHR) is the most sig-
nificant byte (MSB).
– Counter Low Register (CLR) is the least sig-
nificant byte (LSB).
Alternate Counter Registers
– Alternate Counter High Register (ACHR) is the
most significant byte (MSB).
– Alternate Counter Low Register (ACLR) is the
least significant byte (LSB).
These two read-only 16-bit registers contain the
same value but with the difference that reading the
ACLR register does not clear the TOF bit (overflow
flag), (see note page 3).
Writing in the CLR register or ACLR register resets
the free running counter to the FFFCh value.
The timer clock depends on the clock control bits
of the CR2 register, as illustrated in
Table 7 Clock
Control Bits
. The value in the counter register re-
peats every 131.072, 262.144 or 524.288 internal
processor clock cycles depending on the CC1 and
CC0 bits.
相關(guān)PDF資料
PDF描述
L9813 SUPER SMART MIRROR WITH EMBEDDED MCU
L9820 HIGH SIDE DRIVER
L9820D HIGH SIDE DRIVER
L9822E Octal Serial Solenoid Driver(八串行螺線管驅(qū)動器)
L9822ED CAP CER 1000PF 1KVDC B RAD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
L9805E 功能描述:馬達/運動/點火控制器和驅(qū)動器 Super Smart Power 8-Bit MCU, RAM RoHS:否 制造商:STMicroelectronics 產(chǎn)品:Stepper Motor Controllers / Drivers 類型:2 Phase Stepper Motor Driver 工作電源電壓:8 V to 45 V 電源電流:0.5 mA 工作溫度:- 25 C to + 125 C 安裝風格:SMD/SMT 封裝 / 箱體:HTSSOP-28 封裝:Tube
L9811 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Peripheral Driver
L9812R 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Peripheral Driver
L9813 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SUPER SMART MIRROR WITH EMBEDDED MCU
L981CG-1 制造商:Thomas & Betts 功能描述:1/2 T CONDUIT BODY W/CVR & GASKET,E
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*