參數(shù)資料
型號： L9230-DIE1
廠商： 意法半導(dǎo)體
英文描述： SPI CONTROLLED H-BRIDGE
中文描述： 可控的SPI H橋
文件頁數(shù)： 9/25頁
文件大?。?/td> 218K
代理商： L9230-DIE1
9/25
L9230
-I
SCK
Input Current
Pull up current source connected
to V
S
20
50
μ
A
Input SS
(Slave select signal)
V
SSL
Low Level
L9230 is selected
1
V
V
SSH
High Level
2
V
V
SS
Hysteresis
0.1
0.4
V
C
SS
Input Capacity
10
pF
-I
SS
Input Current
Pull up current source connected
to VDD
20
50
μ
A
Input SI
(SPI data input)
V
SIL
Low Level
1
V
V
SIH
High Level
2
V
V
SI
Hysteresis
0.1
0.4
V
C
SI
Input Capacity
10
pF
-I
SI
Input Current
Pull up current source connected
to VDD
20
50
μ
A
Output SO
(Tristate output of the L9230 (SPI output); On active reset (DI) output SO is in tristate.)
V
SOL
Low Level
I
SO
= 2mA
0.4
V
V
SOH
High Level
I
SO
= -2mA
V
VDD
- 0.75
V
C
SO
Capacity
Capacity of the pin in tristate
10
pF
I
SO
Leakage Current
In tristate
-10
10
μ
A
Input DMS
(Supply-Input for the SPI-Inteface and Selection Pin for SPI- or SF-Mode)
V
i
Input Voltage
SPI-Mode
Status-Flag-Mode
3.5
0.8
V
V
I
c
Input Current
SPI-Mode
10
mA
Timing
t
cyc
Cycle-Time
(referred to master)
200
ns
t
lead
Enable Lead Time
(referred to master)
100
ns
t
lag
Enable Lag Time
(referred to master)
150
ns
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
ELECTRICAL CHARACTERISTICS
(continued)
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