參數(shù)資料
型號(hào): L6728TR
廠商: 意法半導(dǎo)體
英文描述: Single phase PWM controller with PowerGOOD
中文描述: 單相PWM控制器與電源良好
文件頁(yè)數(shù): 5/32頁(yè)
文件大?。?/td> 942K
代理商: L6728TR
L6728
Pins description and connection diagrams
5/32
2
Pins description and connection diagrams
2.1
Pin descriptions
Figure 3.
Pins connection (top view)
Table 2.
Pins description
Pin #
Name
Function
1
BOOT
HS Driver Supply.
Connect through a capacitor (100nF) to the floating node (LS-Drain) pin
and provide necessary bootstrap diode from VCC.
2
PHASE
HS Driver return path, current-reading and adaptive-dead-time monitor.
Connect to the LS drain to sense RdsON drop to measure the output
current. This pin is also used by the adaptive-dead-time control circuitry to
monitor when HS MOSFET is OFF.
3
UGATE
HS Driver Output. Connect directly to HS MOSFET gate.
4
LGATE / OC
LGATE
. LS Driver Output. Connect directly to LS MOSFET gate.
OC
. Over Current threshold set. During a short period of time following
VCC rising over UVLO threshold, a 10
μ
A current is sourced from this pin.
Connect to GND with an R
OCSET
resistor greater than 5k
to program OC
Threshold. The resulting voltage at this pin is sampled and held internally
as the OC set point. Maximum programmable OC threshold is 0.55V. A
voltage greater than 0.6V activates an internal clamp and causes OC
threshold to be set at the maximum value.
5
GND
All internal references, logic and drivers are connected to this pin.
Connect to the PCB ground plane.
6
VCC
Device and Drivers power supply.
Operative range from 5V to 12V. Filter with at least TBD nF MLCC to GND.
7
COMP / DIS
COMP.
Error Amplifier Output. Connect with an R
F
- C
F
// C
P
to FB to
compensate the device control loop.
DIS.
The device can be disabled by pushing this pin lower than 0.75V(typ).
Setting free the pin, the device enables again.
8
FB
Error Amplifier Inverting Input.
Connect with a resistor R
FB
to the output regulated voltage. Output resistor
divider may be used to regulate voltages higher than the reference.
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