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參數(shù)資料
| 型號(hào)： | L6728TR |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Single phase PWM controller with PowerGOOD |
| 中文描述： | 單相PWM控制器與電源良好 |
| 文件頁數(shù)： | 18/32頁 |
| 文件大?。?/td> | 942K |
| 代理商： | L6728TR |
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Application details
L6728
18/32
Figure 7.
Power connections (heavy lines)
Gate traces and phase trace must be sized according to the driver RMS current delivered to
the power MOSFET. The device robustness allows managing applications with the power
section far from the controller without losing performances. Anyway, when possible, it is
recommended to minimize the distance between controller and power section.
Small signal components and connections to critical nodes of the application, as well as
bypass capacitors for the device supply, are also important. Locate bypass capacitor (VCC
and Bootstrap capacitor) and feedback compensation components as close to the device as
practical. For over current programmability, place R
OCSET
close to the device and avoid
leakage current paths on COMP/OC pin, since the internal current source is only 60
μ
A.
Systems that do not use Schottky diode in parallel to the Low-Side MOSFET might show big
negative spikes on the phase pin. This spike must be limited within the absolute maximum
ratings (for example, adding a gate resistor in series to HS MOSFET gate), as well as the
positive spike, but has an additional consequence: it causes the bootstrap capacitor to be
over-charged. This extra-charge can cause, in the worst case condition of maximum input
voltage and during particular transients, that boot-to-phase voltage overcomes the absolute
maximum ratings also causing device failures. It is then suggested in this cases to limit this
extra-charge by adding a small resistor in series to the boot capacitor (one resistor in series
to BOOT).
Figure 8.
Drivers turn-on and turn-off paths
L
C
IN
V
IN
UGATE
PHASE
LGATE
GND
LOAD
L6728
C
OUT
R
GATE
R
INT
C
GD
C
GS
C
DS
VCC
LS DRIVER
LS MOSFET
GND
LGATE
R
GATE
R
INT
C
GD
C
GS
C
DS
BOOT
HS DRIVER
HS MOSFET
PHASE
UGATE
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